ddr3_12.1V/
ddr3_12.1V/db/
ddr3_12.1V/db/ddr3.db_info
ddr3_12.1V/db/ddr3.qns
ddr3_12.1V/db/ddr3.sas
ddr3_12.1V/db/ddr3.sld_design_entry.sci
ddr3_12.1V/ddr3/
ddr3_12.1V/ddr3.bsf
ddr3_12.1V/ddr3.cmp
ddr3_12.1V/ddr3.ppf
ddr3_12.1V/ddr3.qip
ddr3_12.1V/ddr3.qpf
ddr3_12.1V/ddr3.qsf
ddr3_12.1V/ddr3.qws
ddr3_12.1V/ddr3.sip
ddr3_12.1V/ddr3.sopcinfo
ddr3_12.1V/ddr3.spd
ddr3_12.1V/ddr3.vhd
ddr3_12.1V/ddr3/afi_mux_ddr3_ddrx.v
ddr3_12.1V/ddr3/altdq_dqs2_stratixv.sv
ddr3_12.1V/ddr3/altera_avalon_mm_bridge.v
ddr3_12.1V/ddr3/altera_avalon_packets_to_master.v
ddr3_12.1V/ddr3/altera_avalon_sc_fifo.v
ddr3_12.1V/ddr3/altera_avalon_st_bytes_to_packets.v
ddr3_12.1V/ddr3/altera_avalon_st_clock_crosser.v
ddr3_12.1V/ddr3/altera_avalon_st_idle_inserter.v
ddr3_12.1V/ddr3/altera_avalon_st_idle_remover.v
ddr3_12.1V/ddr3/altera_avalon_st_jtag_interface.sdc
ddr3_12.1V/ddr3/altera_avalon_st_jtag_interface.v
ddr3_12.1V/ddr3/altera_avalon_st_packets_to_bytes.v
ddr3_12.1V/ddr3/altera_avalon_st_pipeline_base.v
ddr3_12.1V/ddr3/altera_jtag_dc_streaming.v
ddr3_12.1V/ddr3/altera_jtag_sld_node.v
ddr3_12.1V/ddr3/altera_jtag_streaming.v
ddr3_12.1V/ddr3/altera_mem_if_dll_stratixv.sv
ddr3_12.1V/ddr3/altera_mem_if_oct_stratixv.sv
ddr3_12.1V/ddr3/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst.v
ddr3_12.1V/ddr3/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench.v
ddr3_12.1V/ddr3/altera_mem_if_sequencer_mem_no_ifdef_params.sv
ddr3_12.1V/ddr3/altera_merlin_arbitrator.sv
ddr3_12.1V/ddr3/altera_merlin_burst_uncompressor.sv
ddr3_12.1V/ddr3/altera_merlin_master_agent.sv
ddr3_12.1V/ddr3/altera_merlin_master_translator.sv
ddr3_12.1V/ddr3/altera_merlin_slave_agent.sv
ddr3_12.1V/ddr3/altera_merlin_slave_translator.sv
ddr3_12.1V/ddr3/altera_merlin_traffic_limiter.sv
ddr3_12.1V/ddr3/altera_pli_streaming.v
ddr3_12.1V/ddr3/altera_reset_controller.sdc
ddr3_12.1V/ddr3/altera_reset_controller.v
ddr3_12.1V/ddr3/altera_reset_synchronizer.v
ddr3_12.1V/ddr3/alt_mem_ddrx_addr_cmd.v
ddr3_12.1V/ddr3/alt_mem_ddrx_addr_cmd_wrap.v
ddr3_12.1V/ddr3/alt_mem_ddrx_arbiter.v
ddr3_12.1V/ddr3/alt_mem_ddrx_axi_st_converter.v
ddr3_12.1V/ddr3/alt_mem_ddrx_buffer.v
ddr3_12.1V/ddr3/alt_mem_ddrx_buffer_manager.v
ddr3_12.1V/ddr3/alt_mem_ddrx_burst_gen.v
ddr3_12.1V/ddr3/alt_mem_ddrx_burst_tracking.v
ddr3_12.1V/ddr3/alt_mem_ddrx_cmd_gen.v
ddr3_12.1V/ddr3/alt_mem_ddrx_controller.v
ddr3_12.1V/ddr3/alt_mem_ddrx_controller_st_top.v
ddr3_12.1V/ddr3/alt_mem_ddrx_csr.v
ddr3_12.1V/ddr3/alt_mem_ddrx_dataid_manager.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ddr2_odt_gen.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ddr3_odt_gen.v
ddr3_12.1V/ddr3/alt_mem_ddrx_define.iv
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_decoder.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_decoder_32_syn.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_decoder_64_syn.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_encoder.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_encoder_32_syn.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_encoder_64_syn.v
ddr3_12.1V/ddr3/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v
ddr3_12.1V/ddr3/alt_mem_ddrx_fifo.v
ddr3_12.1V/ddr3/alt_mem_ddrx_input_if.v
ddr3_12.1V/ddr3/alt_mem_ddrx_list.v
ddr3_12.1V/ddr3/alt_mem_ddrx_lpddr2_addr_cmd.v
ddr3_12.1V/ddr3/alt_mem_ddrx_mm_st_converter.v
ddr3_12.1V/ddr3/alt_mem_ddrx_odt_gen.v
ddr3_12.1V/ddr3/alt_mem_ddrx_rank_timer.v
ddr3_12.1V/ddr3/alt_mem_ddrx_rdata_path.v
ddr3_12.1V/ddr3/alt_mem_ddrx_rdwr_data_tmg.v
ddr3_12.1V/ddr3/alt_mem_ddrx_sideband.v
ddr3_12.1V/ddr3/alt_mem_ddrx_tbp.v
ddr3_12.1V/ddr3/alt_mem_ddrx_timing_param.v
ddr3_12.1V/ddr3/alt_mem_ddrx_wdata_path.v
ddr3_12.1V/ddr3/alt_mem_if_nextgen_ddr3_controller_core.sv
ddr3_12.1V/ddr3/ddr3_0002.v
ddr3_12.1V/ddr3/ddr3_c0.v
ddr3_12.1V/ddr3/ddr3_dmaster.v
ddr3_12.1V/ddr3/ddr3_dmaster_b2p_adapter.v
ddr3_12.1V/ddr3/ddr3_dmaster_p2b_adapter.v
ddr3_12.1V/ddr3/ddr3_dmaster_timing_adt.v
ddr3_12.1V/ddr3/ddr3_p0.ppf
ddr3_12.1V/ddr3/ddr3_p0.sdc
ddr3_12.1V/ddr3/ddr3_p0.sv
ddr3_12.1V/ddr3/ddr3_p0_acv_ldc.v
ddr3_12.1V/ddr3/ddr3_p0_addr_cmd_datapath.v
ddr3_12.1V/ddr3/ddr3_p0_addr_cmd_ldc_pad.v
ddr3_12.1V/ddr3/ddr3_p0_addr_cmd_ldc_pads.v
ddr3_12.1V/ddr3/ddr3_p0_addr_cmd_non_ldc_pad.v
ddr3_12.1V/ddr3/ddr3_p0_altdqdqs.v
ddr3_12.1V/ddr3/ddr3_p0_clock_pair_generator.v
ddr3_12.1V/ddr3/ddr3_p0_core_shadow_registers.sv
ddr3_12.1V/ddr3/ddr3_p0_fr_cycle_extender.v
ddr3_12.1V/ddr3/ddr3_p0_fr_cycle_shifter.v
ddr3_12.1V/ddr3/ddr3_p0_iss_probe.v
ddr3_12.1V/ddr3/ddr3_p0_memphy.sv
ddr3_12.1V/ddr3/ddr3_p0_new_io_pads.v
ddr3_12.1V/ddr3/ddr3_p0_parameters.tcl
ddr3_12.1V/ddr3/ddr3_p0_phy_csr.sv
ddr3_12.1V/ddr3/ddr3_p0_pin_assignments.tcl
ddr3_12.1V/ddr3/ddr3_p0_pin_map.tcl
ddr3_12.1V/ddr3/ddr3_p0_read_datapath.sv
ddr3_12.1V/ddr3/ddr3_p0_read_fifo_hard.v
ddr3_12.1V/ddr3/ddr3_p0_read_valid_selector.v
ddr3_12.1V/ddr3/ddr3_p0_report_timing.tcl
ddr3_12.1V/ddr3/ddr3_p0_report_timing_core.tcl
ddr3_12.1V/ddr3/ddr3_p0_reset.v
ddr3_12.1V/ddr3/ddr3_p0_reset_sync.v
ddr3_12.1V/ddr3/ddr3_p0_simple_ddio_out.sv
ddr3_12.1V/ddr3/ddr3_p0_timing.tcl
ddr3_12.1V/ddr3/ddr3_p0_write_datapath.v
ddr3_12.1V/ddr3/ddr3_pll0.sv
ddr3_12.1V/ddr3/ddr3_s0.v
ddr3_12.1V/ddr3/ddr3_s0_AC_ROM.hex
ddr3_12.1V/ddr3/ddr3_s0_addr_router.sv
ddr3_12.1V/ddr3/ddr3_s0_addr_router_001.