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文件名称:CD1_PHOTO_ABLUM(1280)

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2013-08-04
  • 文件大小：
    6.22mb
  • 已下载：
    0次
  • 提 供 者：
    恣***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

在EP3C16 fpga上实现了数码相册，可以从SD卡上读取jpeg图片，并进行解码，最后在VGA显示器上显示1280*1024的图片。-In EP3C16 fpga to achieve a digital photo album that can be read from the SD card jpeg picture and decoding, and finally displayed on a VGA monitor 1280* 1024 picture.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

CD1_PHOTO_ABLUM/
CD1_PHOTO_ABLUM/FPGA/
CD1_PHOTO_ABLUM/FPGA/.sopc_builder/
CD1_PHOTO_ABLUM/FPGA/.sopc_builder/filters.xml
CD1_PHOTO_ABLUM/FPGA/.sopc_builder/install.ptf
CD1_PHOTO_ABLUM/FPGA/.sopc_builder/install2.ptf
CD1_PHOTO_ABLUM/FPGA/.sopc_builder/preferences.xml
CD1_PHOTO_ABLUM/FPGA/AUDIO_DAC_FIFO.v
CD1_PHOTO_ABLUM/FPGA/CCD_Capture.v
CD1_PHOTO_ABLUM/FPGA/CCD_Capture.v.bak
CD1_PHOTO_ABLUM/FPGA/CONTROL.v
CD1_PHOTO_ABLUM/FPGA/I2C_AD9985_Config.v
CD1_PHOTO_ABLUM/FPGA/I2C_AD9985_Config.v.bak
CD1_PHOTO_ABLUM/FPGA/I2C_AD9985_Controller.v
CD1_PHOTO_ABLUM/FPGA/I2C_AD9985_Controller.v.bak
CD1_PHOTO_ABLUM/FPGA/I2C_CCD_Config.v
CD1_PHOTO_ABLUM/FPGA/I2C_CCD_Config.v.bak
CD1_PHOTO_ABLUM/FPGA/I2C_Controller.v
CD1_PHOTO_ABLUM/FPGA/I2C_Controller.v.bak
CD1_PHOTO_ABLUM/FPGA/Image_RW/
CD1_PHOTO_ABLUM/FPGA/Image_RW/Image_RW.v
CD1_PHOTO_ABLUM/FPGA/Image_RW/Image_RW.v.bak
CD1_PHOTO_ABLUM/FPGA/Image_RW/Image_RW_hw.tcl
CD1_PHOTO_ABLUM/FPGA/Image_RW/Image_RW_hw.tcl~
CD1_PHOTO_ABLUM/FPGA/Image_RW_0.v
CD1_PHOTO_ABLUM/FPGA/KEY.v
CD1_PHOTO_ABLUM/FPGA/LED.v
CD1_PHOTO_ABLUM/FPGA/LVDS_T.qip
CD1_PHOTO_ABLUM/FPGA/Line_Buffer.qip
CD1_PHOTO_ABLUM/FPGA/Line_Buffer.v
CD1_PHOTO_ABLUM/FPGA/Line_Buffer.v.bak
CD1_PHOTO_ABLUM/FPGA/MAC_3.v
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.asm.rpt
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.cdf
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.done
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.dpf
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.fit.rpt
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.fit.smsg
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.fit.summary
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.flow.rpt
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.jdi
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.map.rpt
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.map.smsg
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.map.summary
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.pin
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.pof
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.qpf
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.qsf
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.qsf.bak
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.sof
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.sta.rpt
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.sta.summary
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.v
CD1_PHOTO_ABLUM/FPGA/PIC_LAY.v.bak
CD1_PHOTO_ABLUM/FPGA/PIO.v
CD1_PHOTO_ABLUM/FPGA/PLL108.ppf
CD1_PHOTO_ABLUM/FPGA/PLL108.qip
CD1_PHOTO_ABLUM/FPGA/PLL108.v
CD1_PHOTO_ABLUM/FPGA/PLL50.ppf
CD1_PHOTO_ABLUM/FPGA/PLL50.qip
CD1_PHOTO_ABLUM/FPGA/PLL50.v
CD1_PHOTO_ABLUM/FPGA/PLLJ_PLLSPE_INFO.txt
CD1_PHOTO_ABLUM/FPGA/RAW2RGB.v
CD1_PHOTO_ABLUM/FPGA/RAW2RGB.v.bak
CD1_PHOTO_ABLUM/FPGA/Reset_Delay.v
CD1_PHOTO_ABLUM/FPGA/SPI_CONFIG.v
CD1_PHOTO_ABLUM/FPGA/SPI_MASTER.v
CD1_PHOTO_ABLUM/FPGA/SRAM.v
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K/
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K/SRAM_16Bit_512K_hw.tcl
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K/SRAM_16Bit_512K_hw.tcl.bak
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K/hdl/
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K/hdl/SRAM_16Bit_512K.v
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K/hdl/SRAM_16Bit_512K.v.bak
CD1_PHOTO_ABLUM/FPGA/SRAM_16Bit_512K_0.v
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.lock
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.cdt.core/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.history/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.root/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.root/1.tree
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.safetable/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/.settings/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.prefs
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.debug.core/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.debug.ui/
CD1_PHOTO_ABLUM/FPGA/Sdram_Control_4Port/.metadata/.plugins/org.eclipse.ui.ide/
CD1_PHOTO_ABLUM/

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