CDN加速镜像 | 设为首页 | 加入收藏夹
登陆 | 会员注册
当前位置： 首页 资源下载 源码下载 嵌入式/单片机编程 VHDL编程
收藏

文件名称:shizhong_xianshi

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
  • 上传时间：
    2013-08-18
  • 文件大小：
    685.21kb
  • 已下载：
    0次
  • 提 供 者：
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

使用Altera型FPGA的数字时钟，使用按键显示，具有调时计时功能-Using Altera FPGA-based digital clock, using the key display, with timing function when adjusting
(系统自动生成,下载前可以参看下载内容)

下载文件列表

shizhong_xianshi/clock.asm.rpt
shizhong_xianshi/clock.cdf
shizhong_xianshi/clock.done
shizhong_xianshi/clock.dpf
shizhong_xianshi/clock.fit.rpt
shizhong_xianshi/clock.fit.smsg
shizhong_xianshi/clock.fit.summary
shizhong_xianshi/clock.flow.rpt
shizhong_xianshi/clock.map.rpt
shizhong_xianshi/clock.map.summary
shizhong_xianshi/clock.pin
shizhong_xianshi/clock.pof
shizhong_xianshi/clock.qpf
shizhong_xianshi/clock.qsf
shizhong_xianshi/clock.qws
shizhong_xianshi/clock.sim.rpt
shizhong_xianshi/clock.sof
shizhong_xianshi/clock.tan.rpt
shizhong_xianshi/clock.tan.summary
shizhong_xianshi/clock.vhd
shizhong_xianshi/clock.vwf
shizhong_xianshi/db/add_sub_lkc.tdf
shizhong_xianshi/db/add_sub_mkc.tdf
shizhong_xianshi/db/alt_u_div_ive.tdf
shizhong_xianshi/db/alt_u_div_kve.tdf
shizhong_xianshi/db/alt_u_div_lve.tdf
shizhong_xianshi/db/alt_u_div_ove.tdf
shizhong_xianshi/db/clock.(0).cnf.cdb
shizhong_xianshi/db/clock.(0).cnf.hdb
shizhong_xianshi/db/clock.(1).cnf.cdb
shizhong_xianshi/db/clock.(1).cnf.hdb
shizhong_xianshi/db/clock.(10).cnf.cdb
shizhong_xianshi/db/clock.(10).cnf.hdb
shizhong_xianshi/db/clock.(11).cnf.cdb
shizhong_xianshi/db/clock.(11).cnf.hdb
shizhong_xianshi/db/clock.(12).cnf.cdb
shizhong_xianshi/db/clock.(12).cnf.hdb
shizhong_xianshi/db/clock.(13).cnf.cdb
shizhong_xianshi/db/clock.(13).cnf.hdb
shizhong_xianshi/db/clock.(14).cnf.cdb
shizhong_xianshi/db/clock.(14).cnf.hdb
shizhong_xianshi/db/clock.(15).cnf.cdb
shizhong_xianshi/db/clock.(15).cnf.hdb
shizhong_xianshi/db/clock.(16).cnf.cdb
shizhong_xianshi/db/clock.(16).cnf.hdb
shizhong_xianshi/db/clock.(17).cnf.cdb
shizhong_xianshi/db/clock.(17).cnf.hdb
shizhong_xianshi/db/clock.(18).cnf.cdb
shizhong_xianshi/db/clock.(18).cnf.hdb
shizhong_xianshi/db/clock.(19).cnf.cdb
shizhong_xianshi/db/clock.(19).cnf.hdb
shizhong_xianshi/db/clock.(2).cnf.cdb
shizhong_xianshi/db/clock.(2).cnf.hdb
shizhong_xianshi/db/clock.(20).cnf.cdb
shizhong_xianshi/db/clock.(20).cnf.hdb
shizhong_xianshi/db/clock.(21).cnf.cdb
shizhong_xianshi/db/clock.(21).cnf.hdb
shizhong_xianshi/db/clock.(22).cnf.cdb
shizhong_xianshi/db/clock.(22).cnf.hdb
shizhong_xianshi/db/clock.(23).cnf.cdb
shizhong_xianshi/db/clock.(23).cnf.hdb
shizhong_xianshi/db/clock.(3).cnf.cdb
shizhong_xianshi/db/clock.(3).cnf.hdb
shizhong_xianshi/db/clock.(4).cnf.cdb
shizhong_xianshi/db/clock.(4).cnf.hdb
shizhong_xianshi/db/clock.(5).cnf.cdb
shizhong_xianshi/db/clock.(5).cnf.hdb
shizhong_xianshi/db/clock.(6).cnf.cdb
shizhong_xianshi/db/clock.(6).cnf.hdb
shizhong_xianshi/db/clock.(7).cnf.cdb
shizhong_xianshi/db/clock.(7).cnf.hdb
shizhong_xianshi/db/clock.(8).cnf.cdb
shizhong_xianshi/db/clock.(8).cnf.hdb
shizhong_xianshi/db/clock.(9).cnf.cdb
shizhong_xianshi/db/clock.(9).cnf.hdb
shizhong_xianshi/db/clock.asm.qmsg
shizhong_xianshi/db/clock.asm_labs.ddb
shizhong_xianshi/db/clock.cbx.xml
shizhong_xianshi/db/clock.cmp.cdb
shizhong_xianshi/db/clock.cmp.hdb
shizhong_xianshi/db/clock.cmp.kpt
shizhong_xianshi/db/clock.cmp.logdb
shizhong_xianshi/db/clock.cmp.rdb
shizhong_xianshi/db/clock.cmp.tdb
shizhong_xianshi/db/clock.cmp0.ddb
shizhong_xianshi/db/clock.cmp2.ddb
shizhong_xianshi/db/clock.dbp
shizhong_xianshi/db/clock.db_info
shizhong_xianshi/db/clock.eco.cdb
shizhong_xianshi/db/clock.eds_overflow
shizhong_xianshi/db/clock.fit.qmsg
shizhong_xianshi/db/clock.fnsim.hdb
shizhong_xianshi/db/clock.fnsim.qmsg
shizhong_xianshi/db/clock.hier_info
shizhong_xianshi/db/clock.hif
shizhong_xianshi/db/clock.map.cdb
shizhong_xianshi/db/clock.map.hdb
shizhong_xianshi/db/clock.map.logdb
shizhong_xianshi/db/clock.map.qmsg
shizhong_xianshi/db/clock.pre_map.cdb
shizhong_xianshi/db/clock.pre_map.hdb
shizhong_xianshi/db/clock.psp
shizhong_xianshi/db/clock.rtlv.hdb
shizhong_xianshi/db/clock.rtlv_sg.cdb
shizhong_xianshi/db/clock.rtlv_sg_swap.cdb
shizhong_xianshi/db/clock.sgdiff.cdb
shizhong_xianshi/db/clock.sgdiff.hdb
shizhong_xianshi/db/clock.signalprobe.cdb
shizhong_xianshi/db/clock.sim.hdb
shizhong_xianshi/db/clock.sim.qmsg
shizhong_xianshi/db/clock.sim.rdb
shizhong_xianshi/db/clock.sim.vwf
shizhong_xianshi/db/clock.sld_design_entry.sci
shizhong_xianshi/db/clock.sld_design_entry_dsc.sci
shizhong_xianshi/db/clock.syn_hier_info
shizhong_xianshi/db/clock.tan.qmsg
shizhong_xianshi/db/lpm_divide_25m.tdf
shizhong_xianshi/db/lpm_divide_45m.tdf
shizhong_xianshi/db/lpm_divide_ucm.tdf
shizhong_xianshi/db/lpm_divide_vcm.tdf
shizhong_xianshi/db/mux_0kc.tdf
shizhong_xianshi/db/mux_5kc.tdf
shizhong_xianshi/db/mux_llc.tdf
shizhong_xianshi/db/sign_div_unsign_8kh.tdf
shizhong_xianshi/db/sign_div_unsign_9kh.tdf
shizhong_xianshi/db/sign_div_unsign_akh.tdf
shizhong_xianshi/db/sign_div_unsign_bkh.tdf
shizhong_xianshi/db/wed.zsf
shizhong_xianshi/output_file.map
shizhong_xianshi/output_file.pof
shizhong_xianshi/db
shizhong_xianshi

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台，只提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 本站已设置防盗链，请勿用迅雷、QQ旋风等下载软件下载资源，下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或换浏览器；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*快速评论： 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内　　容：
*验 证 码：
搜珍网 www.dssz.com