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文件名称:SDRAM_verilog@tequan

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2013-08-27
  • 文件大小：
    3.85mb
  • 已下载：
    0次
  • 提 供 者：
    xiaoy*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

本资源是特权同学编写的sdram控制器，包括数据读写，串口输出，很有学习价值-This resource is privileged students write sdram controller, including data read and write, serial port output, is worth learning


(系统自动生成,下载前可以参看下载内容)

下载文件列表

SDRAM/
SDRAM/data_generator.v
SDRAM/data_generator.v.bak
SDRAM/db/
SDRAM/db/logic_util_heursitic.dat
SDRAM/db/prev_cmp_sdram_top.qmsg
SDRAM/db/sdram_top.(0).cnf.cdb
SDRAM/db/sdram_top.(0).cnf.hdb
SDRAM/db/sdram_top.(1).cnf.cdb
SDRAM/db/sdram_top.(1).cnf.hdb
SDRAM/db/sdram_top.(2).cnf.cdb
SDRAM/db/sdram_top.(2).cnf.hdb
SDRAM/db/sdram_top.(3).cnf.cdb
SDRAM/db/sdram_top.(3).cnf.hdb
SDRAM/db/sdram_top.amm.cdb
SDRAM/db/sdram_top.asm.qmsg
SDRAM/db/sdram_top.asm.rdb
SDRAM/db/sdram_top.cbx.xml
SDRAM/db/sdram_top.cmp.kpt
SDRAM/db/sdram_top.cmp.rdb
SDRAM/db/sdram_top.cmp_merge.kpt
SDRAM/db/sdram_top.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
SDRAM/db/sdram_top.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
SDRAM/db/sdram_top.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
SDRAM/db/sdram_top.db_info
SDRAM/db/sdram_top.eda.qmsg
SDRAM/db/sdram_top.fit.qmsg
SDRAM/db/sdram_top.hier_info
SDRAM/db/sdram_top.hif
SDRAM/db/sdram_top.idb.cdb
SDRAM/db/sdram_top.lpc.html
SDRAM/db/sdram_top.lpc.rdb
SDRAM/db/sdram_top.lpc.txt
SDRAM/db/sdram_top.map.bpm
SDRAM/db/sdram_top.map.cdb
SDRAM/db/sdram_top.map.hdb
SDRAM/db/sdram_top.map.kpt
SDRAM/db/sdram_top.map.logdb
SDRAM/db/sdram_top.map.qmsg
SDRAM/db/sdram_top.map_bb.cdb
SDRAM/db/sdram_top.map_bb.hdb
SDRAM/db/sdram_top.map_bb.logdb
SDRAM/db/sdram_top.pre_map.cdb
SDRAM/db/sdram_top.pre_map.hdb
SDRAM/db/sdram_top.rpp.qmsg
SDRAM/db/sdram_top.rtlv.hdb
SDRAM/db/sdram_top.rtlv_sg.cdb
SDRAM/db/sdram_top.rtlv_sg_swap.cdb
SDRAM/db/sdram_top.sgate.rvd
SDRAM/db/sdram_top.sgate_sm.rvd
SDRAM/db/sdram_top.sgdiff.cdb
SDRAM/db/sdram_top.sgdiff.hdb
SDRAM/db/sdram_top.sld_design_entry.sci
SDRAM/db/sdram_top.sld_design_entry_dsc.sci
SDRAM/db/sdram_top.smart_action.txt
SDRAM/db/sdram_top.smp_dump.txt
SDRAM/db/sdram_top.sta.qmsg
SDRAM/db/sdram_top.sta.rdb
SDRAM/db/sdram_top.syn_hier_info
SDRAM/db/sdram_top.tiscmp.fastest_slow_1200mv_0c.ddb
SDRAM/db/sdram_top.tiscmp.fastest_slow_1200mv_85c.ddb
SDRAM/db/sdram_top.tiscmp.fast_1200mv_0c.ddb
SDRAM/db/sdram_top.tiscmp.slow_1200mv_0c.ddb
SDRAM/db/sdram_top.tiscmp.slow_1200mv_85c.ddb
SDRAM/db/sdram_top.tis_db_list.ddb
SDRAM/db/sdram_top.tmw_info
SDRAM/fifo_ctrl.v
SDRAM/fifo_ctrl.v.bak
SDRAM/greybox_tmp/
SDRAM/greybox_tmp/cbx_args.txt
SDRAM/incremental_db/
SDRAM/incremental_db/compiled_partitions/
SDRAM/incremental_db/compiled_partitions/sdram_top.db_info
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.cmp.cdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.cmp.dfp
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.cmp.hdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.cmp.kpt
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.cmp.logdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.cmp.rcfdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.cdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.dpi
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.hbdb.cdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.hbdb.hb_info
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.hbdb.hdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.hbdb.sig
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.hdb
SDRAM/incremental_db/compiled_partitions/sdram_top.root_partition.map.kpt
SDRAM/incremental_db/README
SDRAM/rdfifo.bsf
SDRAM/rdfifo.qip
SDRAM/rdfifo.v
SDRAM/rdfifo_bb.v
SDRAM/rdfifo_inst.v
SDRAM/sdram_cmd.v
SDRAM/sdram_cmd.v.bak
SDRAM/sdram_control.v.bak
SDRAM/sdram_ctrl.v
SDRAM/sdram_ctrl.v.bak
SDRAM/sdram_para.v
SDRAM/sdram_para.v.bak
SDRAM/sdram_top.asm.rpt
SDRAM/sdram_top.done
SDRAM/sdram_top.eda.rpt
SDRAM/sdram_top.fit.rpt
SDRAM/sdram_top.fit.smsg
SDRAM/sdram_top.fit.summary
SDRAM/sdram_top.flow.rpt
SDRAM/sdram_top.map.rpt
SDRAM/sdram_top.map.smsg
SDRAM/sdram_top.map.summary
SDRAM/sdram_top.pin
SDRAM/sdram_top.qpf
SDRAM/sdram_top.qsf
SDRAM/sdram_top.sof
SDRAM/sdram_top.sta.rpt
SDRAM/sdram_top.sta.summary
SDRAM/sdram_top.v
SDRAM/sdram_top.v.bak
SDRAM/sdram_wrdata.v
SDRAM/sdram_wrdata.v.bak
SDRAM/simulation/
SDRAM/simulation/modelsim/
SDRAM/simulation/modelsim/sdram_top.sft
SDRAM/simulation/modelsim/sdram_top.vo
SDRAM/simulation/modelsim/sdram_top_8_1200mv_0c_slow.vo
SDRAM/simulation/modelsim/sdram_top_8_1200mv_0c_v_slow.sdo
SDRAM/simulation/modelsim/sdram_top_8_1200mv_85c_slow.vo
SDRAM/simulation/modelsim/sdram_top_8_1200mv_85c_v_slow.sdo
SDRAM/simulation/modelsim/sdram_top_min_1200mv_0c_fast.vo
SDRAM/simulation/modelsim/sdram_top_min_1200mv_0c_v_fast.sdo
SDRAM/simulation/modelsim/sdram_top_modelsim.xrf
SDRAM/simulation/modelsim/sdram_top_v.sdo
SDRAM/src/
SDRAM/src/sdram_cmd.v
SDRAM/src/sdram_ctrl.v
SDRAM/src/sdram_top.v
SDRAM/src/sdram_wr_data.v
SDRAM/src/sdram_wr_data.v.bak
SDRAM/src/sdr_para.v
SDRAM/uart_tx.v
SDRAM/uart_tx.v.bak
SDRAM/wrfifo.bsf
SDRAM/wrfifo.qip
SDRAM/wrfifo.v
SDRAM/wrfifo_bb.v
SDRAM/wrfifo_inst.v

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