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文件名称:multi_cpu

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2013-09-04
  • 文件大小：
    2.13mb
  • 已下载：
    0次
  • 提 供 者：
    张****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

用xilinx ISE 14.3开发的多周期CPU系统，开发语言为verilog HDL.仿真调试与实际测试均已通过-Using xilinx ISE 14.3 development of multi-cycle CPU system, development language for verilog HDL. Simulation debugging and practical tests have passed
(系统自动生成,下载前可以参看下载内容)

下载文件列表

multi_cpu_3110104501/.lso
multi_cpu_3110104501/alu.v
multi_cpu_3110104501/aluctr.v
multi_cpu_3110104501/ALUnit.v
multi_cpu_3110104501/alu_oritest.v
multi_cpu_3110104501/alu_wrapper.v
multi_cpu_3110104501/coregen_xil_5216_19.cgc
multi_cpu_3110104501/coregen_xil_5216_19.cgp
multi_cpu_3110104501/counter_1s.v
multi_cpu_3110104501/ctrl.prj
multi_cpu_3110104501/ctrl.stx
multi_cpu_3110104501/ctrl.v
multi_cpu_3110104501/ctrl.xst
multi_cpu_3110104501/display.v
multi_cpu_3110104501/display32bits.v
multi_cpu_3110104501/fuse.log
multi_cpu_3110104501/fuse.xmsgs
multi_cpu_3110104501/fuseRelaunch.cmd
multi_cpu_3110104501/gpr.v
multi_cpu_3110104501/ipcore_dir/blk_mem_gen_ds512.pdf
multi_cpu_3110104501/ipcore_dir/blk_mem_gen_readme.txt
multi_cpu_3110104501/ipcore_dir/coregen.cgc
multi_cpu_3110104501/ipcore_dir/coregen.cgp
multi_cpu_3110104501/ipcore_dir/coregen.log
multi_cpu_3110104501/ipcore_dir/coregen.rsp
multi_cpu_3110104501/ipcore_dir/memory.asy
multi_cpu_3110104501/ipcore_dir/memory.gise
multi_cpu_3110104501/ipcore_dir/memory.mif
multi_cpu_3110104501/ipcore_dir/memory.ncf
multi_cpu_3110104501/ipcore_dir/memory.ngc
multi_cpu_3110104501/ipcore_dir/memory.sym
multi_cpu_3110104501/ipcore_dir/memory.v
multi_cpu_3110104501/ipcore_dir/memory.veo
multi_cpu_3110104501/ipcore_dir/memory.vhd
multi_cpu_3110104501/ipcore_dir/memory.vho
multi_cpu_3110104501/ipcore_dir/memory.xco
multi_cpu_3110104501/ipcore_dir/memory.xco.bak
multi_cpu_3110104501/ipcore_dir/memory.xise
multi_cpu_3110104501/ipcore_dir/memorysimple.asy
multi_cpu_3110104501/ipcore_dir/memorysimple.gise
multi_cpu_3110104501/ipcore_dir/memorysimple.mif
multi_cpu_3110104501/ipcore_dir/memorysimple.ngc
multi_cpu_3110104501/ipcore_dir/memorysimple.sym
multi_cpu_3110104501/ipcore_dir/memorysimple.v
multi_cpu_3110104501/ipcore_dir/memorysimple.veo
multi_cpu_3110104501/ipcore_dir/memorysimple.vhd
multi_cpu_3110104501/ipcore_dir/memorysimple.vho
multi_cpu_3110104501/ipcore_dir/memorysimple.xco
multi_cpu_3110104501/ipcore_dir/memorysimple.xise
multi_cpu_3110104501/ipcore_dir/memorysimple_flist.txt
multi_cpu_3110104501/ipcore_dir/memorysimple_xmdf.tcl
multi_cpu_3110104501/ipcore_dir/memory_flist.txt
multi_cpu_3110104501/ipcore_dir/memory_xmdf.tcl
multi_cpu_3110104501/ipcore_dir/_xmsgs/ngcbuild.xmsgs
multi_cpu_3110104501/ipcore_dir/_xmsgs/pn_parser.xmsgs
multi_cpu_3110104501/ipcore_dir/_xmsgs/xst.xmsgs
multi_cpu_3110104501/iseconfig/multi_cpu_3110104501.projectmgr
multi_cpu_3110104501/iseconfig/multi_cpu_top.xreport
multi_cpu_3110104501/iseconfig/pbdebounce.xreport
multi_cpu_3110104501/isim/isim_usage_statistics.html
multi_cpu_3110104501/isim/pn_info
multi_cpu_3110104501/isim/temp/alu.sdb
multi_cpu_3110104501/isim/temp/alu_wrapper.sdb
multi_cpu_3110104501/isim/temp/ctrl.sdb
multi_cpu_3110104501/isim/temp/display.sdb
multi_cpu_3110104501/isim/temp/display32bits.sdb
multi_cpu_3110104501/isim/temp/glbl.sdb
multi_cpu_3110104501/isim/temp/memory.sdb
multi_cpu_3110104501/isim/temp/memorysimple.sdb
multi_cpu_3110104501/isim/temp/regs.sdb
multi_cpu_3110104501/isim/temp/testmt_sim.sdb
multi_cpu_3110104501/isim/temp/testmultitop.sdb
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/isimcrash.log
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/isimkernel.log
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/netId.dat
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/testmemsin_isim_beh.exe
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/tmp_save/_1
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000003324198333_2700776020.c
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000003324198333_2700776020.didat
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000003324198333_2700776020.nt.obj
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000003617557875_3532342300.c
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000003617557875_3532342300.didat
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000003617557875_3532342300.nt.obj
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.c
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.didat
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/m_00000000004134447467_2073120511.nt.obj
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/testmemsin_isim_beh.exe_main.c
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/work/testmemsin_isim_beh.exe_main.nt.obj
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000051027770_0410213272.c
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000051027770_0410213272.didat
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000000051027770_0410213272.nt.obj
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/xilinxcorelib_ver/m_00000000001358910285_3951028267.c
multi_cpu_3110104501/isim/testmemsin_isim_beh.exe.sim/xilinxcorelib_ver/m_00

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