文件名称:LCD1602_Verilog
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- 上传时间:2013-09-21
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文件大小:270.27kb
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实现字符串的显示,左右移动,换行等操作。-to show string,and move from left to right ,changeline.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
LCD1602_Verilog/
LCD1602_Verilog/cmp_state.ini
LCD1602_Verilog/db/
LCD1602_Verilog/db/altsyncram_7i92.tdf
LCD1602_Verilog/db/altsyncram_9i92.tdf
LCD1602_Verilog/db/altsyncram_ph92.tdf
LCD1602_Verilog/db/cntr_9v7.tdf
LCD1602_Verilog/db/cntr_f29.tdf
LCD1602_Verilog/db/cntr_gv7.tdf
LCD1602_Verilog/db/cntr_hv7.tdf
LCD1602_Verilog/db/cntr_ln7.tdf
LCD1602_Verilog/db/cntr_no8.tdf
LCD1602_Verilog/db/cntr_vt9.tdf
LCD1602_Verilog/db/decode_9ie.tdf
LCD1602_Verilog/db/lcd_v.(0).cnf.cdb
LCD1602_Verilog/db/lcd_v.(0).cnf.hdb
LCD1602_Verilog/db/lcd_v.(1).cnf.cdb
LCD1602_Verilog/db/lcd_v.(1).cnf.hdb
LCD1602_Verilog/db/lcd_v.(2).cnf.cdb
LCD1602_Verilog/db/lcd_v.(2).cnf.hdb
LCD1602_Verilog/db/lcd_v.asm.qmsg
LCD1602_Verilog/db/lcd_v.cbx.xml
LCD1602_Verilog/db/lcd_v.cmp.kpt
LCD1602_Verilog/db/lcd_v.cmp.rdb
LCD1602_Verilog/db/lcd_v.cmp2.ddb
LCD1602_Verilog/db/lcd_v.db_info
LCD1602_Verilog/db/lcd_v.eco.cdb
LCD1602_Verilog/db/lcd_v.fit.qmsg
LCD1602_Verilog/db/lcd_v.hier_info
LCD1602_Verilog/db/lcd_v.hif
LCD1602_Verilog/db/lcd_v.map.logdb
LCD1602_Verilog/db/lcd_v.map.qmsg
LCD1602_Verilog/db/lcd_v.map_bb.kpt
LCD1602_Verilog/db/lcd_v.pre_map.cdb
LCD1602_Verilog/db/lcd_v.pre_map.hdb
LCD1602_Verilog/db/lcd_v.rtlv.hdb
LCD1602_Verilog/db/lcd_v.rtlv_sg.cdb
LCD1602_Verilog/db/lcd_v.rtlv_sg_swap.cdb
LCD1602_Verilog/db/lcd_v.sgdiff.cdb
LCD1602_Verilog/db/lcd_v.sgdiff.hdb
LCD1602_Verilog/db/lcd_v.sld_design_entry_dsc.sci
LCD1602_Verilog/db/lcd_v.smp_dump.txt
LCD1602_Verilog/db/lcd_v.syn_hier_info
LCD1602_Verilog/db/lcd_v.tan.qmsg
LCD1602_Verilog/db/lcd_v.tis_db_list.ddb
LCD1602_Verilog/db/prev_cmp_lcd_v.asm.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.fit.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.map.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.sta.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.tan.qmsg
LCD1602_Verilog/div16.bsf
LCD1602_Verilog/DIV16.v
LCD1602_Verilog/incremental_db/
LCD1602_Verilog/incremental_db/compiled_partitions/
LCD1602_Verilog/incremental_db/compiled_partitions/lcd_v.root_partition.map.kpt
LCD1602_Verilog/incremental_db/README
LCD1602_Verilog/lcd.bsf
LCD1602_Verilog/lcd.v
LCD1602_Verilog/lcd_v.asm.rpt
LCD1602_Verilog/lcd_v.bdf
LCD1602_Verilog/lcd_v.cdf
LCD1602_Verilog/lcd_v.done
LCD1602_Verilog/lcd_v.dpf
LCD1602_Verilog/lcd_v.fit.eqn
LCD1602_Verilog/lcd_v.fit.rpt
LCD1602_Verilog/lcd_v.fit.smsg
LCD1602_Verilog/lcd_v.fit.summary
LCD1602_Verilog/lcd_v.flow.rpt
LCD1602_Verilog/lcd_v.map.eqn
LCD1602_Verilog/lcd_v.map.rpt
LCD1602_Verilog/lcd_v.map.summary
LCD1602_Verilog/lcd_v.pin
LCD1602_Verilog/lcd_v.pof
LCD1602_Verilog/lcd_v.qpf
LCD1602_Verilog/lcd_v.qsf
LCD1602_Verilog/lcd_v.qws
LCD1602_Verilog/lcd_v.sof
LCD1602_Verilog/lcd_v.sta.rpt
LCD1602_Verilog/lcd_v.sta.summary
LCD1602_Verilog/lcd_v.tan.rpt
LCD1602_Verilog/lcd_v.tan.summary
LCD1602_Verilog/lcd_v.vwf
LCD1602_Verilog/lcd_v_assignment_defaults.qdf
LCD1602_Verilog/cmp_state.ini
LCD1602_Verilog/db/
LCD1602_Verilog/db/altsyncram_7i92.tdf
LCD1602_Verilog/db/altsyncram_9i92.tdf
LCD1602_Verilog/db/altsyncram_ph92.tdf
LCD1602_Verilog/db/cntr_9v7.tdf
LCD1602_Verilog/db/cntr_f29.tdf
LCD1602_Verilog/db/cntr_gv7.tdf
LCD1602_Verilog/db/cntr_hv7.tdf
LCD1602_Verilog/db/cntr_ln7.tdf
LCD1602_Verilog/db/cntr_no8.tdf
LCD1602_Verilog/db/cntr_vt9.tdf
LCD1602_Verilog/db/decode_9ie.tdf
LCD1602_Verilog/db/lcd_v.(0).cnf.cdb
LCD1602_Verilog/db/lcd_v.(0).cnf.hdb
LCD1602_Verilog/db/lcd_v.(1).cnf.cdb
LCD1602_Verilog/db/lcd_v.(1).cnf.hdb
LCD1602_Verilog/db/lcd_v.(2).cnf.cdb
LCD1602_Verilog/db/lcd_v.(2).cnf.hdb
LCD1602_Verilog/db/lcd_v.asm.qmsg
LCD1602_Verilog/db/lcd_v.cbx.xml
LCD1602_Verilog/db/lcd_v.cmp.kpt
LCD1602_Verilog/db/lcd_v.cmp.rdb
LCD1602_Verilog/db/lcd_v.cmp2.ddb
LCD1602_Verilog/db/lcd_v.db_info
LCD1602_Verilog/db/lcd_v.eco.cdb
LCD1602_Verilog/db/lcd_v.fit.qmsg
LCD1602_Verilog/db/lcd_v.hier_info
LCD1602_Verilog/db/lcd_v.hif
LCD1602_Verilog/db/lcd_v.map.logdb
LCD1602_Verilog/db/lcd_v.map.qmsg
LCD1602_Verilog/db/lcd_v.map_bb.kpt
LCD1602_Verilog/db/lcd_v.pre_map.cdb
LCD1602_Verilog/db/lcd_v.pre_map.hdb
LCD1602_Verilog/db/lcd_v.rtlv.hdb
LCD1602_Verilog/db/lcd_v.rtlv_sg.cdb
LCD1602_Verilog/db/lcd_v.rtlv_sg_swap.cdb
LCD1602_Verilog/db/lcd_v.sgdiff.cdb
LCD1602_Verilog/db/lcd_v.sgdiff.hdb
LCD1602_Verilog/db/lcd_v.sld_design_entry_dsc.sci
LCD1602_Verilog/db/lcd_v.smp_dump.txt
LCD1602_Verilog/db/lcd_v.syn_hier_info
LCD1602_Verilog/db/lcd_v.tan.qmsg
LCD1602_Verilog/db/lcd_v.tis_db_list.ddb
LCD1602_Verilog/db/prev_cmp_lcd_v.asm.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.fit.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.map.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.sta.qmsg
LCD1602_Verilog/db/prev_cmp_lcd_v.tan.qmsg
LCD1602_Verilog/div16.bsf
LCD1602_Verilog/DIV16.v
LCD1602_Verilog/incremental_db/
LCD1602_Verilog/incremental_db/compiled_partitions/
LCD1602_Verilog/incremental_db/compiled_partitions/lcd_v.root_partition.map.kpt
LCD1602_Verilog/incremental_db/README
LCD1602_Verilog/lcd.bsf
LCD1602_Verilog/lcd.v
LCD1602_Verilog/lcd_v.asm.rpt
LCD1602_Verilog/lcd_v.bdf
LCD1602_Verilog/lcd_v.cdf
LCD1602_Verilog/lcd_v.done
LCD1602_Verilog/lcd_v.dpf
LCD1602_Verilog/lcd_v.fit.eqn
LCD1602_Verilog/lcd_v.fit.rpt
LCD1602_Verilog/lcd_v.fit.smsg
LCD1602_Verilog/lcd_v.fit.summary
LCD1602_Verilog/lcd_v.flow.rpt
LCD1602_Verilog/lcd_v.map.eqn
LCD1602_Verilog/lcd_v.map.rpt
LCD1602_Verilog/lcd_v.map.summary
LCD1602_Verilog/lcd_v.pin
LCD1602_Verilog/lcd_v.pof
LCD1602_Verilog/lcd_v.qpf
LCD1602_Verilog/lcd_v.qsf
LCD1602_Verilog/lcd_v.qws
LCD1602_Verilog/lcd_v.sof
LCD1602_Verilog/lcd_v.sta.rpt
LCD1602_Verilog/lcd_v.sta.summary
LCD1602_Verilog/lcd_v.tan.rpt
LCD1602_Verilog/lcd_v.tan.summary
LCD1602_Verilog/lcd_v.vwf
LCD1602_Verilog/lcd_v_assignment_defaults.qdf
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