• Clock frequency: 166, 143 MHz

• Fully synchronous all signals referenced to a

positive clock edge

• Internal bank for hiding row access/precharge

• Single 3.3V power supply

• LVTTL interface

• Programmable burst length

– (1, 2, 4, 8, full page)

• Programmable burst sequence:

Sequential/Interleave

• Self refresh modes

• 4096 refresh cycles every 64 ms

• Random column address every clock cycle

• Programmable CAS latency (2, 3 clocks)

• Burst read/write and burst read/single write

operations capability

• Burst termination by burst stop and precharge

command

• Byte controlled by LDQM and UDQM

• Industrial temperature availability

• Package: 400-mil 54-pin TSOP II, 60-ball fBGA

• Lead-free package is available-•　Clock frequency: 166, 143 MHz

•　Fully synchronous　all signals referenced to a

positive clock edge

•　Internal bank for hiding row access/precharge

•　Single 3.3V power supply

•　LVTTL interface

•　Programmable burst length

– (1, 2, 4, 8, full page)

•　Programmable burst sequence:

Sequential/Interleave

•　Self refresh modes

•　4096 refresh cycles every 64 ms

•　Random column address every clock cycle

•　Programmable CAS latency (2, 3 clocks)

•　Burst read/write and burst read/single write

operations capability

•　Burst termination by burst stop and precharge

command

•　Byte controlled by LDQM and UDQM

•　Industrial temperature availability

•　Package:　400-mil 54-pin TSOP II, 60-ball fBGA

•　Lead-free package is available