文件名称:05_sdram_vga_test
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- 上传时间:2013-10-18
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文件大小:2.08mb
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VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用,通过SDRAM。-VIP FPGA board example.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
05_sdram_vga_test/
05_sdram_vga_test/core/
05_sdram_vga_test/core/sdram_pll.bsf
05_sdram_vga_test/core/sdram_pll.ppf
05_sdram_vga_test/core/sdram_pll.qip
05_sdram_vga_test/core/sdram_pll.v
05_sdram_vga_test/dev/
05_sdram_vga_test/dev/sdram_vga_test.asm.rpt
05_sdram_vga_test/dev/sdram_vga_test.cdf
05_sdram_vga_test/dev/sdram_vga_test.done
05_sdram_vga_test/dev/sdram_vga_test.dpf
05_sdram_vga_test/dev/sdram_vga_test.fit.rpt
05_sdram_vga_test/dev/sdram_vga_test.fit.smsg
05_sdram_vga_test/dev/sdram_vga_test.fit.summary
05_sdram_vga_test/dev/sdram_vga_test.flow.rpt
05_sdram_vga_test/dev/sdram_vga_test.map.rpt
05_sdram_vga_test/dev/sdram_vga_test.map.smsg
05_sdram_vga_test/dev/sdram_vga_test.map.summary
05_sdram_vga_test/dev/sdram_vga_test.pin
05_sdram_vga_test/dev/sdram_vga_test.pof
05_sdram_vga_test/dev/sdram_vga_test.qpf
05_sdram_vga_test/dev/sdram_vga_test.qsf
05_sdram_vga_test/dev/sdram_vga_test.qws
05_sdram_vga_test/dev/sdram_vga_test.sof
05_sdram_vga_test/dev/sdram_vga_test.tan.rpt
05_sdram_vga_test/dev/sdram_vga_test.tan.summary
05_sdram_vga_test/dev/sdram_vga_test.tcl
05_sdram_vga_test/dev/undo_redo.txt
05_sdram_vga_test/doc/
05_sdram_vga_test/sim/
05_sdram_vga_test/src/
05_sdram_vga_test/src/data_generate.v
05_sdram_vga_test/src/data_generate.v.bak
05_sdram_vga_test/src/data_readstream.v
05_sdram_vga_test/src/lcd_ip.zip
05_sdram_vga_test/src/sdbank_switch.v.bak
05_sdram_vga_test/src/sdram_ip.zip
05_sdram_vga_test/src/sdram_vga_ip/
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/vga_ctrl.c
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/VGA驱动与实现.pdf
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/特效的代码.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_display.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_display.v.bak
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_driver.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_driver.v.bak
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_para.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_para.v.bak
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_top.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_top.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/dcfifo_ctrl.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/dcfifo_ctrl.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo.bsf
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo.qip
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo_wave0.jpg
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdbank_switch.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdbank_switch.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_2fifo_top.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_2fifo_top.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_cmd.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_cmd.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_ctrl.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_ctrl.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_para.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_top.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_top.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_wr_data.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_wr_data.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo.bsf
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo.qip
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo_wave0.jpg
05_sdram_vga_test/src/sdram_vga_ip/sdram_vga_top.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_vga_top.v.bak
05_sdram_vga_test/src/sdram_vga_test.v
05_sdram_vga_test/src/sdram_vga_test.v.bak
05_sdram_vga_test/src/system_ctrl.v
05_sdram_vga_test/src/system_ctrl.v.bak
05_sdram_vga_test/src/uart_ip/
05_sdram_vga_test/src/uart_ip/clk_generator.v
05_sdram_vga_test/src/uart_ip/clk_generator.v.bak
05_sdram_vga_test/src/uart_ip/uart_receiver.v
05_sdram_vga_test/src/uart_ip/uart_top.v
05_sdram_vga_test/src/uart_ip/uart_top.v.bak
05_sdram_vga_test/src/uart_ip/uart_transfer.v
05_sdram_vga_test/src/uart_ip/uart_transfer.v.bak
05_sdram_vga_test/core/
05_sdram_vga_test/core/sdram_pll.bsf
05_sdram_vga_test/core/sdram_pll.ppf
05_sdram_vga_test/core/sdram_pll.qip
05_sdram_vga_test/core/sdram_pll.v
05_sdram_vga_test/dev/
05_sdram_vga_test/dev/sdram_vga_test.asm.rpt
05_sdram_vga_test/dev/sdram_vga_test.cdf
05_sdram_vga_test/dev/sdram_vga_test.done
05_sdram_vga_test/dev/sdram_vga_test.dpf
05_sdram_vga_test/dev/sdram_vga_test.fit.rpt
05_sdram_vga_test/dev/sdram_vga_test.fit.smsg
05_sdram_vga_test/dev/sdram_vga_test.fit.summary
05_sdram_vga_test/dev/sdram_vga_test.flow.rpt
05_sdram_vga_test/dev/sdram_vga_test.map.rpt
05_sdram_vga_test/dev/sdram_vga_test.map.smsg
05_sdram_vga_test/dev/sdram_vga_test.map.summary
05_sdram_vga_test/dev/sdram_vga_test.pin
05_sdram_vga_test/dev/sdram_vga_test.pof
05_sdram_vga_test/dev/sdram_vga_test.qpf
05_sdram_vga_test/dev/sdram_vga_test.qsf
05_sdram_vga_test/dev/sdram_vga_test.qws
05_sdram_vga_test/dev/sdram_vga_test.sof
05_sdram_vga_test/dev/sdram_vga_test.tan.rpt
05_sdram_vga_test/dev/sdram_vga_test.tan.summary
05_sdram_vga_test/dev/sdram_vga_test.tcl
05_sdram_vga_test/dev/undo_redo.txt
05_sdram_vga_test/doc/
05_sdram_vga_test/sim/
05_sdram_vga_test/src/
05_sdram_vga_test/src/data_generate.v
05_sdram_vga_test/src/data_generate.v.bak
05_sdram_vga_test/src/data_readstream.v
05_sdram_vga_test/src/lcd_ip.zip
05_sdram_vga_test/src/sdbank_switch.v.bak
05_sdram_vga_test/src/sdram_ip.zip
05_sdram_vga_test/src/sdram_vga_ip/
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/vga_ctrl.c
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/VGA驱动与实现.pdf
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/doc/特效的代码.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_display.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_display.v.bak
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_driver.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_driver.v.bak
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_para.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_para.v.bak
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_top.v
05_sdram_vga_test/src/sdram_vga_ip/lcd_ip/lcd_top.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/dcfifo_ctrl.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/dcfifo_ctrl.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo.bsf
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo.qip
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/rdfifo_wave0.jpg
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdbank_switch.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdbank_switch.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_2fifo_top.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_2fifo_top.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_cmd.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_cmd.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_ctrl.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_ctrl.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_para.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_top.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_top.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_wr_data.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/sdram_wr_data.v.bak
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo.bsf
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo.qip
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_ip/wrfifo_wave0.jpg
05_sdram_vga_test/src/sdram_vga_ip/sdram_vga_top.v
05_sdram_vga_test/src/sdram_vga_ip/sdram_vga_top.v.bak
05_sdram_vga_test/src/sdram_vga_test.v
05_sdram_vga_test/src/sdram_vga_test.v.bak
05_sdram_vga_test/src/system_ctrl.v
05_sdram_vga_test/src/system_ctrl.v.bak
05_sdram_vga_test/src/uart_ip/
05_sdram_vga_test/src/uart_ip/clk_generator.v
05_sdram_vga_test/src/uart_ip/clk_generator.v.bak
05_sdram_vga_test/src/uart_ip/uart_receiver.v
05_sdram_vga_test/src/uart_ip/uart_top.v
05_sdram_vga_test/src/uart_ip/uart_top.v.bak
05_sdram_vga_test/src/uart_ip/uart_transfer.v
05_sdram_vga_test/src/uart_ip/uart_transfer.v.bak
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