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文件名称:21_ds1302

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    2013-11-15
  • 文件大小:
    4.25mb
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    2次
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基于FPGA与DS1302时钟芯片采用Verilog HDL语言编写的数字时钟实现-Based on FPGA and DS1302 clock chip using Verilog HDL language of the digital clock to achieve
(系统自动生成,下载前可以参看下载内容)

下载文件列表

21_ds1302/ds1302.asm.rpt
21_ds1302/ds1302.done
21_ds1302/ds1302.fit.rpt
21_ds1302/ds1302.fit.smsg
21_ds1302/ds1302.fit.summary
21_ds1302/ds1302.flow.rpt
21_ds1302/ds1302.map.rpt
21_ds1302/ds1302.map.summary
21_ds1302/ds1302.pin
21_ds1302/ds1302.pof
21_ds1302/ds1302.qpf
21_ds1302/ds1302.qsf
21_ds1302/ds1302.sof
21_ds1302/ds1302.sta.rpt
21_ds1302/ds1302.sta.summary
21_ds1302/db/ds1302.(0).cnf.cdb
21_ds1302/db/ds1302.(0).cnf.hdb
21_ds1302/db/ds1302.(1).cnf.cdb
21_ds1302/db/ds1302.(1).cnf.hdb
21_ds1302/db/ds1302.(2).cnf.cdb
21_ds1302/db/ds1302.(2).cnf.hdb
21_ds1302/db/ds1302.(3).cnf.cdb
21_ds1302/db/ds1302.(3).cnf.hdb
21_ds1302/db/ds1302.(4).cnf.cdb
21_ds1302/db/ds1302.(4).cnf.hdb
21_ds1302/db/ds1302.amm.cdb
21_ds1302/db/ds1302.asm.qmsg
21_ds1302/db/ds1302.asm.rdb
21_ds1302/db/ds1302.asm_labs.ddb
21_ds1302/db/ds1302.cbx.xml
21_ds1302/db/ds1302.cmp.bpm
21_ds1302/db/ds1302.cmp.cdb
21_ds1302/db/ds1302.cmp.hdb
21_ds1302/db/ds1302.cmp.kpt
21_ds1302/db/ds1302.cmp.logdb
21_ds1302/db/ds1302.cmp.rdb
21_ds1302/db/ds1302.cmp_merge.kpt
21_ds1302/db/ds1302.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
21_ds1302/db/ds1302.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
21_ds1302/db/ds1302.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
21_ds1302/db/ds1302.db_info
21_ds1302/db/ds1302.fit.qmsg
21_ds1302/db/ds1302.hier_info
21_ds1302/db/ds1302.hif
21_ds1302/db/ds1302.idb.cdb
21_ds1302/db/ds1302.lpc.html
21_ds1302/db/ds1302.lpc.rdb
21_ds1302/db/ds1302.lpc.txt
21_ds1302/db/ds1302.map.bpm
21_ds1302/db/ds1302.map.cdb
21_ds1302/db/ds1302.map.hdb
21_ds1302/db/ds1302.map.kpt
21_ds1302/db/ds1302.map.logdb
21_ds1302/db/ds1302.map.qmsg
21_ds1302/db/ds1302.map_bb.cdb
21_ds1302/db/ds1302.map_bb.hdb
21_ds1302/db/ds1302.map_bb.logdb
21_ds1302/db/ds1302.pre_map.cdb
21_ds1302/db/ds1302.pre_map.hdb
21_ds1302/db/ds1302.rpp.qmsg
21_ds1302/db/ds1302.rtlv.hdb
21_ds1302/db/ds1302.rtlv_sg.cdb
21_ds1302/db/ds1302.rtlv_sg_swap.cdb
21_ds1302/db/ds1302.sgate.rvd
21_ds1302/db/ds1302.sgate_sm.rvd
21_ds1302/db/ds1302.sgdiff.cdb
21_ds1302/db/ds1302.sgdiff.hdb
21_ds1302/db/ds1302.sld_design_entry_dsc.sci
21_ds1302/db/ds1302.smart_action.txt
21_ds1302/db/ds1302.sta.qmsg
21_ds1302/db/ds1302.sta.rdb
21_ds1302/db/ds1302.sta_cmp.8_slow_1200mv_85c.tdb
21_ds1302/db/ds1302.syn_hier_info
21_ds1302/db/ds1302.tiscmp.fastest_slow_1200mv_0c.ddb
21_ds1302/db/ds1302.tiscmp.fastest_slow_1200mv_85c.ddb
21_ds1302/db/ds1302.tiscmp.fast_1200mv_0c.ddb
21_ds1302/db/ds1302.tiscmp.slow_1200mv_0c.ddb
21_ds1302/db/ds1302.tiscmp.slow_1200mv_85c.ddb
21_ds1302/db/ds1302.tis_db_list.ddb
21_ds1302/db/ds1302.tmw_info
21_ds1302/db/logic_util_heursitic.dat
21_ds1302/db/ds1302.sld_design_entry.sci
21_ds1302/incremental_db/README
21_ds1302/incremental_db/compiled_partitions/ds1302.db_info
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.cmp.cdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.cmp.dfp
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.cmp.hdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.cmp.kpt
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.cmp.logdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.cmp.rcfdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.cdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.dpi
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.hbdb.cdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.hbdb.hb_info
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.hbdb.hdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.hbdb.sig
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.hdb
21_ds1302/incremental_db/compiled_partitions/ds1302.root_partition.map.kpt
21_ds1302/source/cmd_control_module.v
21_ds1302/source/ds1302_module.v
21_ds1302/source/function_module.v
21_ds1302/source/rtc_control_module.v
21_ds1302/source/rtc_interface.v
21_ds1302/tcl/21_osh.tcl
21_ds1302/incremental_db/compiled_partitions
21_ds1302/db
21_ds1302/incremental_db
21_ds1302/source
21_ds1302/tcl
21_ds1302

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