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文件名称:FFR_STS

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [Matlab] [源码]
  • 上传时间：
    2014-01-04
  • 文件大小：
    1.06mb
  • 已下载：
    0次
  • 提 供 者：
    zxi***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

一个智能UART的FPGA代码。能给自动根据协议应答-A smart UART FPGA code. Under the agreement will give automatic answering
(系统自动生成,下载前可以参看下载内容)

下载文件列表

FFR_STS/FFR_STS_OUT/dpram2k8.vhd
FFR_STS/FFR_STS_OUT/FfrStsMiniuart.vhd
FFR_STS/FFR_STS_OUT/FfrStsUart.vhd
FFR_STS/FFR_STS_OUT/STS地址表.doc
FFR_STS/FFR_STS_OUT.rar
FFR_STS/iUart/0iUart.mgf
FFR_STS/iUart/1iUart.mgf
FFR_STS/iUart/3iUart.mgf
FFR_STS/iUart/aliases.dat
FFR_STS/iUart/bde.set
FFR_STS/iUart/compilation.order
FFR_STS/iUart/compile/contents.lib~
FFR_STS/iUart/compile/contents.lib~iUart
FFR_STS/iUart/compile/contents.lib~iUart_post_synthesis
FFR_STS/iUart/compile/iUart.cmd
FFR_STS/iUart/compile/iUart.epr
FFR_STS/iUart/compile/iUart.erf
FFR_STS/iUart/compile/sources.sth
FFR_STS/iUart/compile/vsim.log
FFR_STS/iUart/compile.cfg
FFR_STS/iUart/Edfmap.ini
FFR_STS/iUart/elaboration.log
FFR_STS/iUart/iUart.adf
FFR_STS/iUart/iUart.LIB
FFR_STS/iUart/iUart.rlb
FFR_STS/iUart/iUart.wsp
FFR_STS/iUart/iUart_post_synthesis/iUart_post_synthesis.lib
FFR_STS/iUart/log/console.log
FFR_STS/iUart/maliases.dat
FFR_STS/iUart/projlib.cfg
FFR_STS/iUart/results.txt
FFR_STS/iUart/src/source/busctrl/ctrlbus.vhd
FFR_STS/iUart/src/source/BusInreg/BusInReg.vhd
FFR_STS/iUart/src/source/CAN/ctrlcan.vhd
FFR_STS/iUart/src/source/ctrlInport/ctrlINport.vhd
FFR_STS/iUart/src/source/ctrlInport/inport.vhd
FFR_STS/iUart/src/source/ctrlOutport/CtrlMT.vhd
FFR_STS/iUart/src/source/ctrlOutport/CtrlOrbit.vhd
FFR_STS/iUart/src/source/ctrlOutport/ctrlOutport.vhd
FFR_STS/iUart/src/source/ctrlOutport/GenPulse.vhd
FFR_STS/iUart/src/source/ctrlTest/ctrlTest.vhd
FFR_STS/iUart/src/source/decoder/decoder.vhd
FFR_STS/iUart/src/source/GenCycle/ctrlCycle.vhd
FFR_STS/iUart/src/source/misc/DigtalFilterPerClkUnit.vhd
FFR_STS/iUart/src/source/misc/ExtIntArrange.vhd
FFR_STS/iUart/src/source/misc/miscproc.vhd
FFR_STS/iUart/src/source/misc/wave_func/can.awf
FFR_STS/iUart/src/source/misc/wave_func/cycle.awf
FFR_STS/iUart/src/source/misc/wave_func/gps1_1.awf
FFR_STS/iUart/src/source/misc/wave_func/gps1_2.awf
FFR_STS/iUart/src/source/misc/wave_func/gps2_1.awf
FFR_STS/iUart/src/source/misc/wave_func/gps2_2.awf
FFR_STS/iUart/src/source/misc/wave_func/gyro.awf
FFR_STS/iUart/src/source/misc/wave_func/int.awf
FFR_STS/iUart/src/source/misc/wave_func/ires.awf
FFR_STS/iUart/src/source/misc/wave_func/sst1.awf
FFR_STS/iUart/src/source/misc/wave_func/sst2.awf
FFR_STS/iUart/src/source/misc/wave_func/Switch.awf
FFR_STS/iUart/src/source/misc/wave_func/uart.awf
FFR_STS/iUart/src/source/misc/wave_func/untitled.asdb
FFR_STS/iUart/src/source/misc/wave_func/untitled.awc
FFR_STS/iUart/src/source/sync/CtrlSST.vhd
FFR_STS/iUart/src/source/sync/CtrlSync.vhd
FFR_STS/iUart/src/source/sync/GenSync.vhd
FFR_STS/iUart/src/source/sync/GenSyncInt.vhd
FFR_STS/iUart/src/source/sync/procgpsclk1s.vhd
FFR_STS/iUart/src/source/TOP/ctrlnewgen.vhd
FFR_STS/iUart/src/source/UART/allUART.vhd
FFR_STS/iUart/src/source/UART/allUART.vhd.bak
FFR_STS/iUart/src/source/UART/compactUART.vhd
FFR_STS/iUart/src/source/UART/dpram2k8.vhd
FFR_STS/iUart/src/source/UART/FfrStsMiniuart.vhd
FFR_STS/iUart/src/source/UART/FfrStsUart.vhd
FFR_STS/iUart/src/TestBench/ctrlnewgen_TB1.vhd
FFR_STS/iUart/src/TestBench/ctrltest_TB_runtest.do
FFR_STS/iUart/src/TestBench/miscproc_TB_runtest.do
FFR_STS/iUart/src/TestBench/PulseWidthCheck.vhd
FFR_STS/iUart/src/TestBench/ram4x8_TB_runtest.do
FFR_STS/iUart/src/TestBench/SameDriveCheck.vhd
FFR_STS/iUart/src/TestBench/simUART.vhd
FFR_STS/iUart/src/TestBench/simuart_TB_runtest.do
FFR_STS/iUart/src/TestBench/sim_502_package.vhd
FFR_STS/iUart/src/TestBench/stimulus.vhd
FFR_STS/iUart/src/TestBench/uartGen.vhd
FFR_STS/iUart/src/TestBench1/compactuart_TB.vhd
FFR_STS/iUart/src/TestBench1/compactuart_TB_runtest.do
FFR_STS/iUart/src/TestBench1/ctrlnewgen_TB1.vhd
FFR_STS/iUart/src/TestBench1/dpram2k8_TB.vhd
FFR_STS/iUart/src/TestBench1/dpram2k8_TB_runtest.do
FFR_STS/iUart/src/TestBench1/GyroSignalGen.vhd
FFR_STS/iUart/src/TestBench1/IresSignalGen.vhd
FFR_STS/iUart/src/TestBench1/iresuart_TB.vhd
FFR_STS/iUart/src/TestBench1/pulsewidthcheck.vhd
FFR_STS/iUart/src/TestBench1/samedrivecheck.vhd
FFR_STS/iUart/src/TestBench1/simuart.vhd
FFR_STS/iUart/src/TestBench1/simuart_TB_runtest.do
FFR_STS/iUart/src/TestBench1/sim_502_package.vhd
FFR_STS/iUart/src/TestBench1/stimulus.vhd
FFR_STS/iUart/src/TestBench1/stimulus_TB.vhd
FFR_STS/iUart/src/TestBench1/uartgen.vhd
FFR_STS/iUart/src/untitled.asdb
FFR_STS/iUart/src/untitled.awc
FFR_STS/iUart/src/wave.asdb
FFR_STS/iUart/synthesis/command.prd
FFR_STS/iUart/synthesis/command.prj
FFR_STS/iUart/synthesis/iresuart/.recordref
FFR_STS/iUart/synthesis/iresuart/AutoConstraint_IresUart.sdc
FFR_STS/iUart/synthesis/iresuart/iresuart.edf
FFR_STS/iUart/synthesis/iresuart/iresuart.fse
FFR_STS/iUart/synthesis/iresuart/iresuart.htm
FFR_STS/iUart/synthesis/iresuart/iresuart.ncf
FFR_STS/iUart/synthesis/iresuart/iresuart.srd
FFR_STS/iUart/synthesis/iresuart/iresuart.srm
FFR_STS/iUart/synthesis/iresuart/iresuart.srr
FFR_STS/iUart/synthesis/iresuart/iresuart.srs
FFR_STS/iUart/synthesis/iresuart/iresuart.tlg
FFR_STS/iUart/synthesis/iresuart/iresuart.vhm
FFR_STS/iUart/synthesis/iresuart/rpt_IresUart.areasrr
FFR_STS/iUart/synthesis/iresuart/rpt_IresUart_areasrr.htm
FFR_STS/iUart/synthesis/iresuart/syntmp/iresuart.m

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