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文件名称:Syn_FIFO(wanzheng)

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [PDF]
  • 上传时间：
    2014-01-23
  • 文件大小：
    425.93kb
  • 已下载：
    0次
  • 提 供 者：
    杨***
  • 相关连接：
    无
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于IPcore的同步FIFO的编写。读写数据位宽都为8bit，深度为32.-Based IPcore synchronous FIFO preparation. Read and write data width are 8bit, a depth of 32.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Syn_FIFO(wanzheng)/
Syn_FIFO(wanzheng)/flag_gen.v
Syn_FIFO(wanzheng)/fuse.log
Syn_FIFO(wanzheng)/fuse.xmsgs
Syn_FIFO(wanzheng)/fuseRelaunch.cmd
Syn_FIFO(wanzheng)/ipcore_dir/
Syn_FIFO(wanzheng)/ipcore_dir/coregen.cgp
Syn_FIFO(wanzheng)/ipcore_dir/coregen.log
Syn_FIFO(wanzheng)/ipcore_dir/create_RAM.tcl
Syn_FIFO(wanzheng)/ipcore_dir/RAM/
Syn_FIFO(wanzheng)/ipcore_dir/RAM.asy
Syn_FIFO(wanzheng)/ipcore_dir/RAM.gise
Syn_FIFO(wanzheng)/ipcore_dir/RAM.ncf
Syn_FIFO(wanzheng)/ipcore_dir/RAM.ngc
Syn_FIFO(wanzheng)/ipcore_dir/RAM.sym
Syn_FIFO(wanzheng)/ipcore_dir/RAM.v
Syn_FIFO(wanzheng)/ipcore_dir/RAM.veo
Syn_FIFO(wanzheng)/ipcore_dir/RAM.xco
Syn_FIFO(wanzheng)/ipcore_dir/RAM.xise
Syn_FIFO(wanzheng)/ipcore_dir/RAM/blk_mem_gen_v7_3_readme.txt
Syn_FIFO(wanzheng)/ipcore_dir/RAM/doc/
Syn_FIFO(wanzheng)/ipcore_dir/RAM/doc/blk_mem_gen_v7_3_vinfo.html
Syn_FIFO(wanzheng)/ipcore_dir/RAM/doc/pg058-blk-mem-gen.pdf
Syn_FIFO(wanzheng)/ipcore_dir/RAM/example_design/
Syn_FIFO(wanzheng)/ipcore_dir/RAM/example_design/RAM_exdes.ucf
Syn_FIFO(wanzheng)/ipcore_dir/RAM/example_design/RAM_exdes.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/example_design/RAM_exdes.xdc
Syn_FIFO(wanzheng)/ipcore_dir/RAM/example_design/RAM_prod.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/implement.bat
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/implement.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/planAhead_ise.bat
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/planAhead_ise.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/planAhead_ise.tcl
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/xst.prj
Syn_FIFO(wanzheng)/ipcore_dir/RAM/implement/xst.scr
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/addr_gen.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/bmg_stim_gen.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/bmg_tb_pkg.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/checker.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/data_gen.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simcmds.tcl
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simulate_isim.bat
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simulate_mti.bat
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simulate_mti.do
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simulate_mti.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simulate_ncsim.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/simulate_vcs.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/ucli_commands.key
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/vcs_session.tcl
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/wave_mti.do
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/functional/wave_ncsim.sv
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/RAM_synth.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/RAM_tb.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/random.vhd
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simcmds.tcl
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simulate_isim.bat
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simulate_mti.bat
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simulate_mti.do
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simulate_mti.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simulate_ncsim.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/simulate_vcs.sh
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/ucli_commands.key
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/vcs_session.tcl
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/wave_mti.do
Syn_FIFO(wanzheng)/ipcore_dir/RAM/simulation/timing/wave_ncsim.sv
Syn_FIFO(wanzheng)/ipcore_dir/RAM_flist.txt
Syn_FIFO(wanzheng)/ipcore_dir/RAM_xmdf.tcl
Syn_FIFO(wanzheng)/ipcore_dir/summary.log
Syn_FIFO(wanzheng)/ipcore_dir/tmp/
Syn_FIFO(wanzheng)/ipcore_dir/tmp/RAM.lso
Syn_FIFO(wanzheng)/ipcore_dir/tmp/_cg/
Syn_FIFO(wanzheng)/ipcore_dir/tmp/_xmsgs/
Syn_FIFO(wanzheng)/ipcore_dir/tmp/_xmsgs/pn_parser.xmsgs
Syn_FIFO(wanzheng)/ipcore_dir/tmp/_xmsgs/xst.xmsgs
Syn_FIFO(wanzheng)/ipcore_dir/xlnx_auto_0_xdb/
Syn_FIFO(wanzheng)/ipcore_dir/_xmsgs/
Syn_FIFO(wanzheng)/ipcore_dir/_xmsgs/cg.xmsgs
Syn_FIFO(wanzheng)/ipcore_dir/_xmsgs/pn_parser.xmsgs
Syn_FIFO(wanzheng)/iseconfig/
Syn_FIFO(wanzheng)/iseconfig/Syn_FIFO.projectmgr
Syn_FIFO(wanzheng)/iseconfig/syn_FIFO.xreport
Syn_FIFO(wanzheng)/isim/
Syn_FIFO(wanzheng)/isim.cmd
Syn_FIFO(wanzheng)/isim.log
Syn_FIFO(wanzheng)/isim/isim_usage_statistics.html
Syn_FIFO(wanzheng)/isim/pn_info
Syn_FIFO(wanzheng)/isim/test_bench_isim_beh.exe.sim/
Syn_FIFO(wanzheng)/isim/test_bench_isim_beh.exe.sim/isimcrash.log
Syn_FIFO(wanzheng)/isim/test_bench_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
Syn_FIFO(wanzheng)/isim/test_bench_isim_beh.exe.sim/isimkernel.log
Syn_FIFO(wanzheng)/isim/test_bench_isim_beh.exe.sim/netId.dat
Syn_FIFO(wanzheng)/isim/test_bench_isim_beh.exe.sim/test_bench_isim_beh.exe
Syn_FIFO(wanzheng)/isim/test_be

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