fenpin/db/half_clk.(0).cnf.cdb
fenpin/db/half_clk.(0).cnf.hdb
fenpin/db/half_clk.cbx.xml
fenpin/db/half_clk.cmp.hdb
fenpin/db/half_clk.cmp.rdb
fenpin/db/half_clk.cmp_merge.kpt
fenpin/db/half_clk.db_info
fenpin/db/half_clk.eda.qmsg
fenpin/db/half_clk.hier_info
fenpin/db/half_clk.hif
fenpin/db/half_clk.lpc.html
fenpin/db/half_clk.lpc.rdb
fenpin/db/half_clk.lpc.txt
fenpin/db/half_clk.map.bpm
fenpin/db/half_clk.map.cdb
fenpin/db/half_clk.map.hdb
fenpin/db/half_clk.map.kpt
fenpin/db/half_clk.map.logdb
fenpin/db/half_clk.map.qmsg
fenpin/db/half_clk.map_bb.cdb
fenpin/db/half_clk.map_bb.hdb
fenpin/db/half_clk.map_bb.logdb
fenpin/db/half_clk.pre_map.cdb
fenpin/db/half_clk.pre_map.hdb
fenpin/db/half_clk.rtlv.hdb
fenpin/db/half_clk.rtlv_sg.cdb
fenpin/db/half_clk.rtlv_sg_swap.cdb
fenpin/db/half_clk.sgdiff.cdb
fenpin/db/half_clk.sgdiff.hdb
fenpin/db/half_clk.sld_design_entry.sci
fenpin/db/half_clk.sld_design_entry_dsc.sci
fenpin/db/half_clk.smart_action.txt
fenpin/db/half_clk.syn_hier_info
fenpin/db/half_clk.tis_db_list.ddb
fenpin/db/logic_util_heursitic.dat
fenpin/db/prev_cmp_half_clk.qmsg
fenpin/half_clk.bsf
fenpin/half_clk.done
fenpin/half_clk.eda.rpt
fenpin/half_clk.flow.rpt
fenpin/half_clk.map.rpt
fenpin/half_clk.map.summary
fenpin/half_clk.qpf
fenpin/half_clk.qsf
fenpin/half_clk.v
fenpin/half_clk.v.bak
fenpin/half_clk_nativelink_simulation.rpt
fenpin/incremental_db/compiled_partitions/half_clk.db_info
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.cdb
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.dpi
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.hbdb.cdb
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.hbdb.hb_info
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.hbdb.hdb
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.hbdb.sig
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.hdb
fenpin/incremental_db/compiled_partitions/half_clk.root_partition.map.kpt
fenpin/incremental_db/README
fenpin/simulation/modelsim/half_clk.vt
fenpin/simulation/modelsim/half_clk.vt.bak
fenpin/simulation/modelsim/half_clk_run_msim_rtl_verilog.do
fenpin/simulation/modelsim/modelsim.ini
fenpin/simulation/modelsim/msim_transcript
fenpin/simulation/modelsim/rtl_work/half_clk/verilog.prw
fenpin/simulation/modelsim/rtl_work/half_clk/verilog.psm
fenpin/simulation/modelsim/rtl_work/half_clk/_primary.dat
fenpin/simulation/modelsim/rtl_work/half_clk/_primary.dbs
fenpin/simulation/modelsim/rtl_work/half_clk/_primary.vhd
fenpin/simulation/modelsim/rtl_work/half_clk_vlg_tst/verilog.prw
fenpin/simulation/modelsim/rtl_work/half_clk_vlg_tst/verilog.psm
fenpin/simulation/modelsim/rtl_work/half_clk_vlg_tst/_primary.dat
fenpin/simulation/modelsim/rtl_work/half_clk_vlg_tst/_primary.dbs
fenpin/simulation/modelsim/rtl_work/half_clk_vlg_tst/_primary.vhd
fenpin/simulation/modelsim/rtl_work/_info
fenpin/simulation/modelsim/rtl_work/_vmake
fenpin/simulation/modelsim/vsim.wlf
fenpin/simulation/modelsim/rtl_work/half_clk
fenpin/simulation/modelsim/rtl_work/half_clk_vlg_tst
fenpin/simulation/modelsim/rtl_work/_temp
fenpin/simulation/modelsim/rtl_work
fenpin/incremental_db/compiled_partitions
fenpin/simulation/modelsim
fenpin/db
fenpin/incremental_db
fenpin/simulation
fenpin