文件名称:VGA
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所属分类:
- 标签属性:
- 上传时间:2014-02-21
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文件大小:169.02kb
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已下载:0次
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提 供 者:
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相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
基于FPGA的VGA的实验演示及vhdl源代码-Based on the experimental demonstration of VGA and FPGA vhdl source code
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VGA/output_file.jic
VGA/output_file.map
VGA/VGA.asm.rpt
VGA/VGA.cdf
VGA/VGA.done
VGA/VGA.dpf
VGA/VGA.eda.rpt
VGA/VGA.epe.rpt
VGA/VGA.epe.summary
VGA/VGA.fit.eqn
VGA/VGA.fit.rpt
VGA/VGA.fit.smsg
VGA/VGA.fit.summary
VGA/VGA.flow.rpt
VGA/VGA.map.eqn
VGA/VGA.map.rpt
VGA/VGA.map.summary
VGA/VGA.pin
VGA/VGA.pof
VGA/VGA.qpf
VGA/VGA.qsf
VGA/VGA.qws
VGA/VGA.sof
VGA/VGA.sta.rpt
VGA/VGA.sta.summary
VGA/VGA.tan.rpt
VGA/VGA.tan.summary
VGA/VGA.tcl
VGA/VGA.vhd
VGA/VGA.vhd.bak
VGA/VGA_assignment_defaults.qdf
VGA/VGA_early_pwr.csv
VGA/VGA_nativelink_simulation.rpt
VGA/simulation/modelsim/msim_transcript
VGA/simulation/modelsim/VGA.sft
VGA/simulation/modelsim/VGA.vo
VGA/simulation/modelsim/VGA.vt
VGA/simulation/modelsim/VGA.vt.bak
VGA/simulation/modelsim/VGA_8_1200mv_0c_slow.vo
VGA/simulation/modelsim/VGA_8_1200mv_0c_v_slow.sdo
VGA/simulation/modelsim/VGA_8_1200mv_85c_slow.vo
VGA/simulation/modelsim/VGA_8_1200mv_85c_v_slow.sdo
VGA/simulation/modelsim/VGA_fast.vo
VGA/simulation/modelsim/VGA_min_1200mv_0c_fast.vo
VGA/simulation/modelsim/VGA_min_1200mv_0c_v_fast.sdo
VGA/simulation/modelsim/VGA_modelsim.xrf
VGA/simulation/modelsim/VGA_run_msim_rtl_vhdl.do
VGA/simulation/modelsim/VGA_run_msim_rtl_vhdl.do.bak
VGA/simulation/modelsim/VGA_v.sdo
VGA/simulation/modelsim/VGA_v_fast.sdo
VGA/simulation/modelsim/rtl_work/_info
VGA/simulation/modelsim/rtl_work/_vmake
VGA/simulation/modelsim/rtl_work/_temp/vlog390qsc
VGA/simulation/modelsim/rtl_work/vga/behavioral.dat
VGA/simulation/modelsim/rtl_work/vga/behavioral.dbs
VGA/simulation/modelsim/rtl_work/vga/behavioral.prw
VGA/simulation/modelsim/rtl_work/vga/behavioral.psm
VGA/simulation/modelsim/rtl_work/vga/_primary.dat
VGA/simulation/modelsim/rtl_work/vga/_primary.dbs
VGA/incremental_db/README
VGA/incremental_db/compiled_partitions/VGA.root_partition.cmp.dfp
VGA/incremental_db/compiled_partitions/VGA.root_partition.cmp.kpt
VGA/incremental_db/compiled_partitions/VGA.root_partition.cmp.logdb
VGA/incremental_db/compiled_partitions/VGA.root_partition.map.dpi
VGA/incremental_db/compiled_partitions/VGA.root_partition.map.kpt
VGA/incremental_db/compiled_partitions/VGA.db_info
VGA/db/logic_util_heursitic.dat
VGA/db/prev_cmp_VGA.asm.qmsg
VGA/db/prev_cmp_VGA.fit.qmsg
VGA/db/prev_cmp_VGA.map.qmsg
VGA/db/prev_cmp_VGA.qmsg
VGA/db/prev_cmp_VGA.sta.qmsg
VGA/db/VGA_global_asgn_op.abo
VGA/db/VGA.db_info
VGA/simulation/modelsim/rtl_work/_temp
VGA/simulation/modelsim/rtl_work/vga
VGA/simulation/modelsim/rtl_work
VGA/simulation/modelsim
VGA/incremental_db/compiled_partitions
VGA/simulation
VGA/incremental_db
VGA/db
VGA
VGA/output_file.map
VGA/VGA.asm.rpt
VGA/VGA.cdf
VGA/VGA.done
VGA/VGA.dpf
VGA/VGA.eda.rpt
VGA/VGA.epe.rpt
VGA/VGA.epe.summary
VGA/VGA.fit.eqn
VGA/VGA.fit.rpt
VGA/VGA.fit.smsg
VGA/VGA.fit.summary
VGA/VGA.flow.rpt
VGA/VGA.map.eqn
VGA/VGA.map.rpt
VGA/VGA.map.summary
VGA/VGA.pin
VGA/VGA.pof
VGA/VGA.qpf
VGA/VGA.qsf
VGA/VGA.qws
VGA/VGA.sof
VGA/VGA.sta.rpt
VGA/VGA.sta.summary
VGA/VGA.tan.rpt
VGA/VGA.tan.summary
VGA/VGA.tcl
VGA/VGA.vhd
VGA/VGA.vhd.bak
VGA/VGA_assignment_defaults.qdf
VGA/VGA_early_pwr.csv
VGA/VGA_nativelink_simulation.rpt
VGA/simulation/modelsim/msim_transcript
VGA/simulation/modelsim/VGA.sft
VGA/simulation/modelsim/VGA.vo
VGA/simulation/modelsim/VGA.vt
VGA/simulation/modelsim/VGA.vt.bak
VGA/simulation/modelsim/VGA_8_1200mv_0c_slow.vo
VGA/simulation/modelsim/VGA_8_1200mv_0c_v_slow.sdo
VGA/simulation/modelsim/VGA_8_1200mv_85c_slow.vo
VGA/simulation/modelsim/VGA_8_1200mv_85c_v_slow.sdo
VGA/simulation/modelsim/VGA_fast.vo
VGA/simulation/modelsim/VGA_min_1200mv_0c_fast.vo
VGA/simulation/modelsim/VGA_min_1200mv_0c_v_fast.sdo
VGA/simulation/modelsim/VGA_modelsim.xrf
VGA/simulation/modelsim/VGA_run_msim_rtl_vhdl.do
VGA/simulation/modelsim/VGA_run_msim_rtl_vhdl.do.bak
VGA/simulation/modelsim/VGA_v.sdo
VGA/simulation/modelsim/VGA_v_fast.sdo
VGA/simulation/modelsim/rtl_work/_info
VGA/simulation/modelsim/rtl_work/_vmake
VGA/simulation/modelsim/rtl_work/_temp/vlog390qsc
VGA/simulation/modelsim/rtl_work/vga/behavioral.dat
VGA/simulation/modelsim/rtl_work/vga/behavioral.dbs
VGA/simulation/modelsim/rtl_work/vga/behavioral.prw
VGA/simulation/modelsim/rtl_work/vga/behavioral.psm
VGA/simulation/modelsim/rtl_work/vga/_primary.dat
VGA/simulation/modelsim/rtl_work/vga/_primary.dbs
VGA/incremental_db/README
VGA/incremental_db/compiled_partitions/VGA.root_partition.cmp.dfp
VGA/incremental_db/compiled_partitions/VGA.root_partition.cmp.kpt
VGA/incremental_db/compiled_partitions/VGA.root_partition.cmp.logdb
VGA/incremental_db/compiled_partitions/VGA.root_partition.map.dpi
VGA/incremental_db/compiled_partitions/VGA.root_partition.map.kpt
VGA/incremental_db/compiled_partitions/VGA.db_info
VGA/db/logic_util_heursitic.dat
VGA/db/prev_cmp_VGA.asm.qmsg
VGA/db/prev_cmp_VGA.fit.qmsg
VGA/db/prev_cmp_VGA.map.qmsg
VGA/db/prev_cmp_VGA.qmsg
VGA/db/prev_cmp_VGA.sta.qmsg
VGA/db/VGA_global_asgn_op.abo
VGA/db/VGA.db_info
VGA/simulation/modelsim/rtl_work/_temp
VGA/simulation/modelsim/rtl_work/vga
VGA/simulation/modelsim/rtl_work
VGA/simulation/modelsim
VGA/incremental_db/compiled_partitions
VGA/simulation
VGA/incremental_db
VGA/db
VGA
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