文件名称:EDAprogram
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- 上传时间:2014-03-18
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文件大小:9.39mb
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已下载:0次
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相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
电子密码锁的设计,其中含程序图和流程各种东西-Design of electronic locks, which contains the program flow diagram and all sorts of things
(系统自动生成,下载前可以参看下载内容)
下载文件列表
EDAprogram/
EDAprogram/CTRL/
EDAprogram/CTRL/CTRL.SchLib
EDAprogram/CTRL/CTRL.Vhd
EDAprogram/CTRL/FPGA_Project3.PrjFpg
EDAprogram/CTRL/FPGA_Project3.SO
EDAprogram/CTRL/History/
EDAprogram/CTRL/History/CTRL.~(1).Vhd.Zip
EDAprogram/CTRL/History/CTRL.~(2).Vhd.Zip
EDAprogram/CTRL/History/CTRL.~(3).Vhd.Zip
EDAprogram/CTRL/History/CTRL.~(4).Vhd.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(1).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(2).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(3).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(4).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(5).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(6).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(7).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(8).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(9).PrjFpg.Zip
EDAprogram/CTRL/History/Test_ctrl.~(1).VHDTST.Zip
EDAprogram/CTRL/History/Test_ctrl.~(2).VHDTST.Zip
EDAprogram/CTRL/History/Test_ctrl.~(3).VHDTST.Zip
EDAprogram/CTRL/ProjectOutputs/
EDAprogram/CTRL/ProjectOutputs/CTRL.AN
EDAprogram/CTRL/ProjectOutputs/FPGA_Project3.AL
EDAprogram/CTRL/ProjectOutputs/Test_ctrl.AN
EDAprogram/CTRL/ProjectOutputs/Test_ctrl.DP
EDAprogram/CTRL/ProjectOutputs/Test_ctrl.VX
EDAprogram/CTRL/ProjectOutputs/results.txt
EDAprogram/CTRL/Schlib1.SchLib
EDAprogram/CTRL/Test_ctrl.VHDTST
EDAprogram/DZMMS/
EDAprogram/DZMMS/CTRL.AN
EDAprogram/DZMMS/CTRL.SchLib
EDAprogram/DZMMS/CTRL.Vhd
EDAprogram/DZMMS/FPGA_PROJECT1.PRJFPG
EDAprogram/DZMMS/FPGA_Project1.PrjFpgStructure
EDAprogram/DZMMS/FPGA_Project1.SO
EDAprogram/DZMMS/GENLCD8.SchLib
EDAprogram/DZMMS/GENLCD8.Vhd
EDAprogram/DZMMS/History/
EDAprogram/DZMMS/History/CTRL.~(1).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(13).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(14).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(15).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(16).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(17).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(18).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(19).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(2).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(20).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(21).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(22).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(23).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(24).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(25).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(26).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(27).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(28).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(29).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(3).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(30).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(31).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(4).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(5).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(6).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(7).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(8).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(9).Vhd.Zip
EDAprogram/DZMMS/History/FPGA_PROJECT1.~(39).PRJFPG.Zip
EDAprogram/DZMMS/History/FPGA_PROJECT1.~(40).PRJFPG.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(1).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(1).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(12).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(13).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(14).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(15).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(16).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(17).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(18).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(19).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(2).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(2).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(20).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(21).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(22).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(23).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(24).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(25).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(26).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(27).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(28).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(29).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(3).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(3).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(30).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(31).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(32).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(33).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(34).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(35).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(36).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(37).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(38).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(4).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(4).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(5).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(6).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(7).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(
EDAprogram/CTRL/
EDAprogram/CTRL/CTRL.SchLib
EDAprogram/CTRL/CTRL.Vhd
EDAprogram/CTRL/FPGA_Project3.PrjFpg
EDAprogram/CTRL/FPGA_Project3.SO
EDAprogram/CTRL/History/
EDAprogram/CTRL/History/CTRL.~(1).Vhd.Zip
EDAprogram/CTRL/History/CTRL.~(2).Vhd.Zip
EDAprogram/CTRL/History/CTRL.~(3).Vhd.Zip
EDAprogram/CTRL/History/CTRL.~(4).Vhd.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(1).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(2).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(3).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(4).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(5).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(6).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(7).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(8).PrjFpg.Zip
EDAprogram/CTRL/History/FPGA_Project3.~(9).PrjFpg.Zip
EDAprogram/CTRL/History/Test_ctrl.~(1).VHDTST.Zip
EDAprogram/CTRL/History/Test_ctrl.~(2).VHDTST.Zip
EDAprogram/CTRL/History/Test_ctrl.~(3).VHDTST.Zip
EDAprogram/CTRL/ProjectOutputs/
EDAprogram/CTRL/ProjectOutputs/CTRL.AN
EDAprogram/CTRL/ProjectOutputs/FPGA_Project3.AL
EDAprogram/CTRL/ProjectOutputs/Test_ctrl.AN
EDAprogram/CTRL/ProjectOutputs/Test_ctrl.DP
EDAprogram/CTRL/ProjectOutputs/Test_ctrl.VX
EDAprogram/CTRL/ProjectOutputs/results.txt
EDAprogram/CTRL/Schlib1.SchLib
EDAprogram/CTRL/Test_ctrl.VHDTST
EDAprogram/DZMMS/
EDAprogram/DZMMS/CTRL.AN
EDAprogram/DZMMS/CTRL.SchLib
EDAprogram/DZMMS/CTRL.Vhd
EDAprogram/DZMMS/FPGA_PROJECT1.PRJFPG
EDAprogram/DZMMS/FPGA_Project1.PrjFpgStructure
EDAprogram/DZMMS/FPGA_Project1.SO
EDAprogram/DZMMS/GENLCD8.SchLib
EDAprogram/DZMMS/GENLCD8.Vhd
EDAprogram/DZMMS/History/
EDAprogram/DZMMS/History/CTRL.~(1).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(13).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(14).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(15).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(16).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(17).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(18).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(19).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(2).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(20).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(21).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(22).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(23).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(24).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(25).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(26).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(27).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(28).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(29).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(3).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(30).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(31).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(4).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(5).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(6).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(7).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(8).Vhd.Zip
EDAprogram/DZMMS/History/CTRL.~(9).Vhd.Zip
EDAprogram/DZMMS/History/FPGA_PROJECT1.~(39).PRJFPG.Zip
EDAprogram/DZMMS/History/FPGA_PROJECT1.~(40).PRJFPG.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(1).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(1).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(12).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(13).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(14).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(15).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(16).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(17).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(18).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(19).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(2).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(2).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(20).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(21).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(22).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(23).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(24).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(25).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(26).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(27).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(28).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(29).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(3).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(3).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(30).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(31).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(32).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(33).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(34).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(35).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(36).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(37).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(38).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(4).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(4).SO.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(5).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(6).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(7).PrjFpg.Zip
EDAprogram/DZMMS/History/FPGA_Project1.~(
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