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文件名称:vga

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2014-03-19
  • 文件大小：
    3.66mb
  • 已下载：
    0次
  • 提 供 者：
    xu***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

用verilog设计控制程序从 ROM模块读取图片信息，然后写入 VGA接口。控制程序每隔250ms写入不同的信息至VGA接口，在屏幕上会出现小绿人的动画。-Reading the image information from the ROM module verilog design control procedures, and then write the VGA connector. Control program every 250ms write different messages to the VGA connector on the screen will appear little green men animated.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

19_vga/db/altsyncram_1qa1.tdf
19_vga/db/altsyncram_a7a1.tdf
19_vga/db/altsyncram_dni1.tdf
19_vga/db/logic_util_heursitic.dat
19_vga/db/pll_module_altpll.v
19_vga/db/prev_cmp_vga.qmsg
19_vga/db/vga.(0).cnf.cdb
19_vga/db/vga.(0).cnf.hdb
19_vga/db/vga.(1).cnf.cdb
19_vga/db/vga.(1).cnf.hdb
19_vga/db/vga.(10).cnf.cdb
19_vga/db/vga.(10).cnf.hdb
19_vga/db/vga.(11).cnf.cdb
19_vga/db/vga.(11).cnf.hdb
19_vga/db/vga.(12).cnf.cdb
19_vga/db/vga.(12).cnf.hdb
19_vga/db/vga.(13).cnf.cdb
19_vga/db/vga.(13).cnf.hdb
19_vga/db/vga.(2).cnf.cdb
19_vga/db/vga.(2).cnf.hdb
19_vga/db/vga.(3).cnf.cdb
19_vga/db/vga.(3).cnf.hdb
19_vga/db/vga.(4).cnf.cdb
19_vga/db/vga.(4).cnf.hdb
19_vga/db/vga.(5).cnf.cdb
19_vga/db/vga.(5).cnf.hdb
19_vga/db/vga.(6).cnf.cdb
19_vga/db/vga.(6).cnf.hdb
19_vga/db/vga.(7).cnf.cdb
19_vga/db/vga.(7).cnf.hdb
19_vga/db/vga.(8).cnf.cdb
19_vga/db/vga.(8).cnf.hdb
19_vga/db/vga.(9).cnf.cdb
19_vga/db/vga.(9).cnf.hdb
19_vga/db/vga.amm.cdb
19_vga/db/vga.asm.qmsg
19_vga/db/vga.asm.rdb
19_vga/db/vga.asm_labs.ddb
19_vga/db/vga.cbx.xml
19_vga/db/vga.cmp.bpm
19_vga/db/vga.cmp.cdb
19_vga/db/vga.cmp.hdb
19_vga/db/vga.cmp.kpt
19_vga/db/vga.cmp.logdb
19_vga/db/vga.cmp.rdb
19_vga/db/vga.cmp_merge.kpt
19_vga/db/vga.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
19_vga/db/vga.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
19_vga/db/vga.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
19_vga/db/vga.db_info
19_vga/db/vga.fit.qmsg
19_vga/db/vga.hier_info
19_vga/db/vga.hif
19_vga/db/vga.idb.cdb
19_vga/db/vga.lpc.html
19_vga/db/vga.lpc.rdb
19_vga/db/vga.lpc.txt
19_vga/db/vga.map.bpm
19_vga/db/vga.map.cdb
19_vga/db/vga.map.hdb
19_vga/db/vga.map.kpt
19_vga/db/vga.map.logdb
19_vga/db/vga.map.qmsg
19_vga/db/vga.map_bb.cdb
19_vga/db/vga.map_bb.hdb
19_vga/db/vga.map_bb.logdb
19_vga/db/vga.pre_map.cdb
19_vga/db/vga.pre_map.hdb
19_vga/db/vga.rtlv.hdb
19_vga/db/vga.rtlv_sg.cdb
19_vga/db/vga.rtlv_sg_swap.cdb
19_vga/db/vga.sgdiff.cdb
19_vga/db/vga.sgdiff.hdb
19_vga/db/vga.sld_design_entry.sci
19_vga/db/vga.sld_design_entry_dsc.sci
19_vga/db/vga.smart_action.txt
19_vga/db/vga.sta.qmsg
19_vga/db/vga.sta.rdb
19_vga/db/vga.sta_cmp.8_slow_1200mv_85c.tdb
19_vga/db/vga.syn_hier_info
19_vga/db/vga.tiscmp.fastest_slow_1200mv_0c.ddb
19_vga/db/vga.tiscmp.fastest_slow_1200mv_85c.ddb
19_vga/db/vga.tiscmp.fast_1200mv_0c.ddb
19_vga/db/vga.tiscmp.slow_1200mv_0c.ddb
19_vga/db/vga.tiscmp.slow_1200mv_85c.ddb
19_vga/db/vga.tis_db_list.ddb
19_vga/db/vga.tmw_info
19_vga/greenman_rom_module.qip
19_vga/greybox_tmp/cbx_args.txt
19_vga/incremental_db/compiled_partitions/vga.db_info
19_vga/incremental_db/compiled_partitions/vga.root_partition.cmp.cdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.cmp.dfp
19_vga/incremental_db/compiled_partitions/vga.root_partition.cmp.hdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.cmp.kpt
19_vga/incremental_db/compiled_partitions/vga.root_partition.cmp.logdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.cmp.rcfdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.cdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.dpi
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.hbdb.cdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.hbdb.hb_info
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.hbdb.hdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.hbdb.sig
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.hdb
19_vga/incremental_db/compiled_partitions/vga.root_partition.map.kpt
19_vga/incremental_db/README
19_vga/PLLJ_PLLSPE_INFO.txt
19_vga/source/greenman.mif
19_vga/source/greenman_rom_module.qip
19_vga/source/greenman_rom_module.v
19_vga/source/greenman_rom_module_bb.v
19_vga/source/greenman_rom_module_inst.v
19_vga/source/pll_module.ppf
19_vga/source/pll_module.qip
19_vga/source/pll_module.v
19_vga/source/pll_module_bb.v
19_vga/source/ram_initial_file.mif
19_vga/source/ram_module.v
19_vga/source/ram_module.v.bak
19_vga/source/sync_module.v
19_vga/source/vga_control_module.v
19_vga/source/vga_interface.v
19_vga/source/vga_interface_demo.v
19_vga/source/vga_interface_demo.v.bak
19_vga/tcl/19_osh.tcl
19_vga/vga.asm.rpt
19_vga/vga.done
19_vga/vga.fit.rpt
19_vga/vga.fit.smsg
19_vga/vga.fit.summary
19_vga/vga.flow.rpt
19_vga/vga.map.rpt
19_vga/vga.map.smsg
19_vga/vga.map.summary
19_vga/vga.pin
19_vga/vga.pof
19_vga/vga.qpf
19_vga/vga.qsf
19_vga/vga.sof
19_vga/vga.sta.rpt
19_vga/vga.sta.summary
19_vga/incremental_db/compiled_partitions
19_vga/db
19_vga/greybox_tmp
19_vga/incremental_db
19_vga/source
19_vga/tcl
19_vga

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