文件名称:ethernet_tri_mode
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- 上传时间:2014-04-08
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文件大小:6.08mb
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三速以太网,仿真测试验证通过,VHDL编写,包含有说明文档和寄存器文档。-trimode ethernet
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下载文件列表
ethernet_tri_mode/.svn/all-wcprops
ethernet_tri_mode/.svn/entries
ethernet_tri_mode/.svn/format
ethernet_tri_mode/branches/.svn/all-wcprops
ethernet_tri_mode/branches/.svn/dir-prop-base
ethernet_tri_mode/branches/.svn/entries
ethernet_tri_mode/branches/.svn/format
ethernet_tri_mode/tags/.svn/all-wcprops
ethernet_tri_mode/tags/.svn/dir-prop-base
ethernet_tri_mode/tags/.svn/entries
ethernet_tri_mode/tags/.svn/format
ethernet_tri_mode/tags/arelease/.svn/all-wcprops
ethernet_tri_mode/tags/arelease/.svn/entries
ethernet_tri_mode/tags/arelease/.svn/format
ethernet_tri_mode/tags/arelease/doc/.svn/all-wcprops
ethernet_tri_mode/tags/arelease/doc/.svn/entries
ethernet_tri_mode/tags/arelease/doc/.svn/format
ethernet_tri_mode/tags/arelease/doc/.svn/prop-base/RGMII_DataSheet.pdf.svn-base
ethernet_tri_mode/tags/arelease/doc/.svn/text-base/RGMII_DataSheet.pdf.svn-base
ethernet_tri_mode/tags/arelease/doc/RGMII_DataSheet.pdf
ethernet_tri_mode/tags/rel-1-0/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/.svn/entries
ethernet_tri_mode/tags/rel-1-0/.svn/format
ethernet_tri_mode/tags/rel-1-0/.svn/text-base/start.tcl.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/bench/.svn/entries
ethernet_tri_mode/tags/rel-1-0/bench/.svn/format
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/entries
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/format
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/altera_mf.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/host_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/Phy_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/reg_int_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/tb_top.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/User_int_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/altera_mf.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/host_sim.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/Phy_sim.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/reg_int_sim.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/tb_top.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/User_int_sim.v
ethernet_tri_mode/tags/rel-1-0/doc/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/doc/.svn/entries
ethernet_tri_mode/tags/rel-1-0/doc/.svn/format
ethernet_tri_mode/tags/rel-1-0/doc/.svn/prop-base/Tri-mode_Ethernet_MAC_Specifications.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/.svn/prop-base/Tri-mode_Ethernet_MAC_Verification_plan.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/.svn/text-base/Tri-mode_Ethernet_MAC_Specifications.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/.svn/text-base/Tri-mode_Ethernet_MAC_Verification_plan.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/Tri-mode_Ethernet_MAC_Specifications.pdf
ethernet_tri_mode/tags/rel-1-0/doc/Tri-mode_Ethernet_MAC_Verification_plan.pdf
ethernet_tri_mode/tags/rel-1-0/rtl/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/rtl/.svn/entries
ethernet_tri_mode/tags/rel-1-0/rtl/.svn/format
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/entries
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/format
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/Clk_ctrl.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/eth_miim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/header.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/MAC_rx.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/MAC_top.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/MAC_tx.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/Phy_int.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/reg_int.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/RMON.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/Clk_ctrl.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/eth_miim.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/header.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/entries
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/format
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/Broadcast_filter.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/CRC_chk.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/MAC_rx_add_chk.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/MAC_rx_ctrl.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/MAC_rx_FF.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/Broadcast_filter.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/CRC_chk.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/MAC_rx_add_chk.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/MAC_rx_ctrl.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/MAC_rx_FF.v
ethernet_tr
ethernet_tri_mode/.svn/entries
ethernet_tri_mode/.svn/format
ethernet_tri_mode/branches/.svn/all-wcprops
ethernet_tri_mode/branches/.svn/dir-prop-base
ethernet_tri_mode/branches/.svn/entries
ethernet_tri_mode/branches/.svn/format
ethernet_tri_mode/tags/.svn/all-wcprops
ethernet_tri_mode/tags/.svn/dir-prop-base
ethernet_tri_mode/tags/.svn/entries
ethernet_tri_mode/tags/.svn/format
ethernet_tri_mode/tags/arelease/.svn/all-wcprops
ethernet_tri_mode/tags/arelease/.svn/entries
ethernet_tri_mode/tags/arelease/.svn/format
ethernet_tri_mode/tags/arelease/doc/.svn/all-wcprops
ethernet_tri_mode/tags/arelease/doc/.svn/entries
ethernet_tri_mode/tags/arelease/doc/.svn/format
ethernet_tri_mode/tags/arelease/doc/.svn/prop-base/RGMII_DataSheet.pdf.svn-base
ethernet_tri_mode/tags/arelease/doc/.svn/text-base/RGMII_DataSheet.pdf.svn-base
ethernet_tri_mode/tags/arelease/doc/RGMII_DataSheet.pdf
ethernet_tri_mode/tags/rel-1-0/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/.svn/entries
ethernet_tri_mode/tags/rel-1-0/.svn/format
ethernet_tri_mode/tags/rel-1-0/.svn/text-base/start.tcl.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/bench/.svn/entries
ethernet_tri_mode/tags/rel-1-0/bench/.svn/format
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/entries
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/format
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/altera_mf.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/host_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/Phy_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/reg_int_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/tb_top.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/.svn/text-base/User_int_sim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/bench/verilog/altera_mf.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/host_sim.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/Phy_sim.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/reg_int_sim.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/tb_top.v
ethernet_tri_mode/tags/rel-1-0/bench/verilog/User_int_sim.v
ethernet_tri_mode/tags/rel-1-0/doc/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/doc/.svn/entries
ethernet_tri_mode/tags/rel-1-0/doc/.svn/format
ethernet_tri_mode/tags/rel-1-0/doc/.svn/prop-base/Tri-mode_Ethernet_MAC_Specifications.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/.svn/prop-base/Tri-mode_Ethernet_MAC_Verification_plan.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/.svn/text-base/Tri-mode_Ethernet_MAC_Specifications.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/.svn/text-base/Tri-mode_Ethernet_MAC_Verification_plan.pdf.svn-base
ethernet_tri_mode/tags/rel-1-0/doc/Tri-mode_Ethernet_MAC_Specifications.pdf
ethernet_tri_mode/tags/rel-1-0/doc/Tri-mode_Ethernet_MAC_Verification_plan.pdf
ethernet_tri_mode/tags/rel-1-0/rtl/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/rtl/.svn/entries
ethernet_tri_mode/tags/rel-1-0/rtl/.svn/format
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/entries
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/format
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/Clk_ctrl.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/eth_miim.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/header.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/MAC_rx.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/MAC_top.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/MAC_tx.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/Phy_int.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/reg_int.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/.svn/text-base/RMON.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/Clk_ctrl.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/eth_miim.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/header.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/all-wcprops
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/entries
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/format
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/Broadcast_filter.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/CRC_chk.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/MAC_rx_add_chk.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/MAC_rx_ctrl.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/.svn/text-base/MAC_rx_FF.v.svn-base
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/Broadcast_filter.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/CRC_chk.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/MAC_rx_add_chk.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/MAC_rx_ctrl.v
ethernet_tri_mode/tags/rel-1-0/rtl/verilog/MAC_rx/MAC_rx_FF.v
ethernet_tr
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