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文件名称:work

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    2014-05-12
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    3.62mb
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数字系统设计及VHDL课上用的易于混淆的代码-Digital system design and use of the VHDL code lesson is easy to confuse
(系统自动生成,下载前可以参看下载内容)

下载文件列表

work/demo 9 process/D_FF.qpf
work/demo 9 process/D_FF.qsf
work/demo 9 process/D_FF.qws
work/demo 9 process/D_FF.vhd
work/demo 9 process/D_FF.vhd.bak
work/demo 9 process/Waveform.vwf
work/demo 9 process/simulation/qsim/D_FF.do
work/demo 9 process/simulation/qsim/D_FF.msim.vcd
work/demo 9 process/simulation/qsim/D_FF.msim.vwf
work/demo 9 process/simulation/qsim/D_FF.sim.vwf
work/demo 9 process/simulation/qsim/D_FF.vo
work/demo 9 process/simulation/qsim/D_FF.vt
work/demo 9 process/simulation/qsim/D_FF_v.sdo
work/demo 9 process/simulation/qsim/D_FF_v.sdo_typ.csd
work/demo 9 process/simulation/qsim/transcript
work/demo 9 process/simulation/qsim/vsim.wlf
work/demo 9 process/simulation/qsim/work/_info
work/demo 9 process/simulation/qsim/work/_vmake
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_vec_tst/verilog.prw
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_vec_tst/verilog.psm
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_vec_tst/_primary.dat
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_vec_tst/_primary.dbs
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_vec_tst/_primary.vhd
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_sample_tst/verilog.prw
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_sample_tst/verilog.psm
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_sample_tst/_primary.dat
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_sample_tst/_primary.dbs
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_sample_tst/_primary.vhd
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_check_tst/verilog.prw
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_check_tst/verilog.psm
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_check_tst/_primary.dat
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_check_tst/_primary.dbs
work/demo 9 process/simulation/qsim/work/@d_@f@f_vlg_check_tst/_primary.vhd
work/demo 9 process/simulation/qsim/work/@d_@f@f/verilog.prw
work/demo 9 process/simulation/qsim/work/@d_@f@f/verilog.psm
work/demo 9 process/simulation/qsim/work/@d_@f@f/_primary.dat
work/demo 9 process/simulation/qsim/work/@d_@f@f/_primary.dbs
work/demo 9 process/simulation/qsim/work/@d_@f@f/_primary.vhd
work/demo 9 process/simulation/modelsim/D_FF.sft
work/demo 9 process/simulation/modelsim/D_FF.vo
work/demo 9 process/simulation/modelsim/D_FF_modelsim.xrf
work/demo 9 process/simulation/modelsim/D_FF_v.sdo
work/demo 9 process/output_files/D_FF.asm.rpt
work/demo 9 process/output_files/D_FF.done
work/demo 9 process/output_files/D_FF.eda.rpt
work/demo 9 process/output_files/D_FF.fit.rpt
work/demo 9 process/output_files/D_FF.fit.smsg
work/demo 9 process/output_files/D_FF.fit.summary
work/demo 9 process/output_files/D_FF.flow.rpt
work/demo 9 process/output_files/D_FF.jdi
work/demo 9 process/output_files/D_FF.map.rpt
work/demo 9 process/output_files/D_FF.map.summary
work/demo 9 process/output_files/D_FF.pin
work/demo 9 process/output_files/D_FF.pof
work/demo 9 process/output_files/D_FF.sta.rpt
work/demo 9 process/output_files/D_FF.sta.summary
work/demo 9 process/incremental_db/README
work/demo 9 process/incremental_db/compiled_partitions/D_FF.db_info
work/demo 9 process/incremental_db/compiled_partitions/D_FF.root_partition.map.kpt
work/demo 9 process/db/D_FF.(0).cnf.cdb
work/demo 9 process/db/D_FF.(0).cnf.hdb
work/demo 9 process/db/D_FF.asm.qmsg
work/demo 9 process/db/D_FF.asm.rdb
work/demo 9 process/db/D_FF.asm_labs.ddb
work/demo 9 process/db/D_FF.cbx.xml
work/demo 9 process/db/D_FF.cmp.cdb
work/demo 9 process/db/D_FF.cmp.hdb
work/demo 9 process/db/D_FF.cmp.idb
work/demo 9 process/db/D_FF.cmp.kpt
work/demo 9 process/db/D_FF.cmp.logdb
work/demo 9 process/db/D_FF.cmp.rdb
work/demo 9 process/db/D_FF.cmp0.ddb
work/demo 9 process/db/D_FF.db_info
work/demo 9 process/db/D_FF.eda.qmsg
work/demo 9 process/db/D_FF.fit.qmsg
work/demo 9 process/db/D_FF.hier_info
work/demo 9 process/db/D_FF.hif
work/demo 9 process/db/D_FF.ipinfo
work/demo 9 process/db/D_FF.lpc.html
work/demo 9 process/db/D_FF.lpc.rdb
work/demo 9 process/db/D_FF.lpc.txt
work/demo 9 process/db/D_FF.map.cdb
work/demo 9 process/db/D_FF.map.hdb
work/demo 9 process/db/D_FF.map.logdb
work/demo 9 process/db/D_FF.map.qmsg
work/demo 9 process/db/D_FF.map.rdb
work/demo 9 process/db/D_FF.pre_map.hdb
work/demo 9 process/db/D_FF.pti_db_list.ddb
work/demo 9 process/db/D_FF.root_partition.map.reg_db.cdb
work/demo 9 process/db/D_FF.routing.rdb
work/demo 9 process/db/D_FF.rpp.qmsg
work/demo 9 process/db/D_FF.rtlv.hdb
work/demo 9 process/db/D_FF.rtlv_sg.cdb
work/demo 9 process/db/D_FF.rtlv_sg_swap.cdb
work/demo 9 process/db/D_FF.sgate.rvd
work/demo 9 process/db/D_FF.sgate_sm.rvd
work/demo 9 process/db/D_FF.sgdiff.cdb
work/demo 9 process/db/D_FF.sgdiff.hdb
work/demo 9 process/db/D_FF.sld_design_entry.sci
work/demo 9 process/db/D_FF.sld_design_entry_dsc.sci
work/demo 9 process/db/D_FF.smart_action.txt
work/demo 9 process/db/D_FF.sta.qmsg
work/demo 9 process/db/D_FF.sta.rdb
work/demo 9 process/db/D_FF.sta_cmp.3_slow.tdb
work/demo 9 process/db/D_FF.syn_hier_info
work/demo 9 process/db/D_FF.tis_db_list.ddb
work/demo 9 process/db/D_FF.vpr.ammdb
work/dem

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