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文件名称:switch_power_identify

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  • 上传时间:
    2014-06-22
  • 文件大小:
    5.12mb
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FPGA实现智能数控电压,此为FPGA代码,器件为A3PN250,软件为libro。采集电压电流参数,实现PID调节,通过串口通信配置,实现输出电压和保护点的调节。-







ON划词翻译ON实时翻译



















FPGA intelligent digital voltage, this FPGA code, based on A3PN250, the software for the libro. Acquisition of voltage and current parameters, PID controller, serial communication through configuration, can adjust the output voltage and the protection point.


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下载文件列表

switch_power_identify/switch_power_identify.prjx
switch_power_identify/viewdraw/viewdraw.ini
switch_power_identify/viewdraw/vf/project.lst
switch_power_identify/tooldata/pllCore_tools.xml
switch_power_identify/tooldata/switch_power_tools.xml
switch_power_identify/tooldata/uart_tx_tools.xml
switch_power_identify/synthesis_3/identify.db
switch_power_identify/synthesis_3/identify.log
switch_power_identify/synthesis_3/identify.srr
switch_power_identify/synthesis_3/istdout.log
switch_power_identify/synthesis_3/run_options.txt
switch_power_identify/synthesis_3/scratchproject.prs
switch_power_identify/synthesis_3/switch_power.srr
switch_power_identify/synthesis_3/syntmp/cmdrec_identify_db_generator.log
switch_power_identify/synthesis_3/syntmp/cmdrec_identify_instrumentor_ui.log
switch_power_identify/synthesis_3/syntmp/run_option.xml
switch_power_identify/synthesis_3/synlog/report/switch_power_identify_db_generator_runstatus.xml
switch_power_identify/synthesis/IICE_mdic2signal.txt
switch_power_identify/synthesis/ipc_tcp_actel.log
switch_power_identify/synthesis/run_options.txt
switch_power_identify/synthesis/scratchproject.prs
switch_power_identify/synthesis/stdout.log
switch_power_identify/synthesis/switch_power.areasrr
switch_power_identify/synthesis/switch_power.edn
switch_power_identify/synthesis/switch_power.fse
switch_power_identify/synthesis/switch_power.htm
switch_power_identify/synthesis/switch_power.map
switch_power_identify/synthesis/switch_power.pdc
switch_power_identify/synthesis/switch_power.sap
switch_power_identify/synthesis/switch_power.sdf
switch_power_identify/synthesis/switch_power.so
switch_power_identify/synthesis/switch_power.srd
switch_power_identify/synthesis/switch_power.srl
switch_power_identify/synthesis/switch_power.srm
switch_power_identify/synthesis/switch_power.srr
switch_power_identify/synthesis/switch_power.srs
switch_power_identify/synthesis/switch_power.szr
switch_power_identify/synthesis/switch_power_scck.rpt
switch_power_identify/synthesis/switch_power_sdc.sdc
switch_power_identify/synthesis/switch_power_syn.prj
switch_power_identify/synthesis/switch_power_syn.tcl
switch_power_identify/synthesis/synplify.log
switch_power_identify/synthesis/traplog.tlg
switch_power_identify/synthesis/uart_tx.areasrr
switch_power_identify/synthesis/uart_tx.edn
switch_power_identify/synthesis/uart_tx.fse
switch_power_identify/synthesis/uart_tx.htm
switch_power_identify/synthesis/uart_tx.map
switch_power_identify/synthesis/uart_tx.pdc
switch_power_identify/synthesis/uart_tx.sap
switch_power_identify/synthesis/uart_tx.sdf
switch_power_identify/synthesis/uart_tx.so
switch_power_identify/synthesis/uart_tx.srd
switch_power_identify/synthesis/uart_tx.srl
switch_power_identify/synthesis/uart_tx.srm
switch_power_identify/synthesis/uart_tx.srr
switch_power_identify/synthesis/uart_tx.srs
switch_power_identify/synthesis/uart_tx.szr
switch_power_identify/synthesis/uart_tx_scck.rpt
switch_power_identify/synthesis/uart_tx_syn.prj
switch_power_identify/synthesis/synwork/switch_power_compiler.so
switch_power_identify/synthesis/synwork/switch_power_compiler.srs
switch_power_identify/synthesis/synwork/switch_power_compiler.tlg
switch_power_identify/synthesis/synwork/switch_power_premap.fse
switch_power_identify/synthesis/synwork/switch_power_premap.srd
switch_power_identify/synthesis/synwork/uart_tx_compiler.tlg
switch_power_identify/synthesis/synwork/uart_tx_premap.fse
switch_power_identify/synthesis/synwork/uart_tx_premap.srd
switch_power_identify/synthesis/syntmp/closed.png
switch_power_identify/synthesis/syntmp/cmdrec_compiler.log
switch_power_identify/synthesis/syntmp/cmdrec_fpga_mapper.log
switch_power_identify/synthesis/syntmp/cmdrec_premap.log
switch_power_identify/synthesis/syntmp/namekey.txt
switch_power_identify/synthesis/syntmp/open.png
switch_power_identify/synthesis/syntmp/run_option.xml
switch_power_identify/synthesis/syntmp/switch_power.msg
switch_power_identify/synthesis/syntmp/switch_power.plg
switch_power_identify/synthesis/syntmp/switch_power_flink.htm
switch_power_identify/synthesis/syntmp/switch_power_fpga_mapper.msg
switch_power_identify/synthesis/syntmp/switch_power_fpga_mapper_report.htm
switch_power_identify/synthesis/syntmp/switch_power_premap.msg
switch_power_identify/synthesis/syntmp/switch_power_srr.htm
switch_power_identify/synthesis/syntmp/switch_power_toc.htm
switch_power_identify/synthesis/syntmp/uart_tx.msg
switch_power_identify/synthesis/syntmp/uart_tx.plg
switch_power_identify/synthesis/syntmp/uart_tx_flink.htm
switch_power_identify/synthesis/syntmp/uart_tx_srr.htm
switch_power_identify/synthesis/syntmp/uart_tx_toc.htm
switch_power_identify/synthesis/synthesis_3/switch_power.srl
switch_power_identify/synthesis/synthesis_3/switch_power.srs
switch_power_identify/synthesis/synthesis_3/syntmp/switch_power.msg
switch_power_identify/synthesis/synthesis_2/identify.db
switch_power_identify/synthesis/synthesis_2/identify.log
switch_power_identify/synthesis/synthesis_2/identify.srr
switch_power_identify/synthesis/synthesis_2/identify.tcl
switch_power_identify/synthesis/synthesis_2/instr.db
switch_power_ide

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