文件名称:DE2_115_WEB_SERVER_MII_ENET1
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DE2_115_WEB_SERVER_MII_ENET1:千兆以太网,ALTERA公司DE2板网络通信，实现PC机控制板子LED级数码管/LCD屏显示（MII）-DE2_115_WEB_SERVER_MII_ENET1:Gigabit Ethernet, ALTERA DE2 board network communications company, to achieve control of the PC board level digital tube LED/LCD screen display (MII)
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下载文件列表
DE2_115_WEB_SERVER_MII_ENET1/.qsys_edit/filters.xml
DE2_115_WEB_SERVER_MII_ENET1/.qsys_edit/preferences.xml
DE2_115_WEB_SERVER_MII_ENET1/ddr_o.bsf
DE2_115_WEB_SERVER_MII_ENET1/ddr_o.qip
DE2_115_WEB_SERVER_MII_ENET1/ddr_o.v
DE2_115_WEB_SERVER_MII_ENET1/ddr_o_bb.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_golden_sopc.sdc
DE2_115_WEB_SERVER_MII_ENET1/de2_115_golden_sopc.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/de2_115_WEB_Qsys.qip
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/de2_115_WEB_Qsys.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_dc_fifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_mm_clock_crossing_bridge.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_sc_fifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_st_clock_crosser.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_dcfifo_synchronizer_bundle.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_irq_clock_crosser.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_arbitrator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_burst_adapter.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_master_agent.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_master_translator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_slave_agent.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_slave_translator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_std_arbitrator_core.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_traffic_limiter.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_width_adapter.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_reset_controller.sdc
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_reset_controller.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_reset_synchronizer.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tristate_controller_aggregator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tristate_controller_translator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_align_sync.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_arriagx.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_basic.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_gige.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_gige_wo_rmfifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt4gxb_gige.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt4gxb_gige_wo_rmfifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altgx_civgx_gige.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altgx_civgx_gige_wo_rmfifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altshifttaps.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altsyncram_dpm_fifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_avst_to_gmii_if.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_13.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_24.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_34.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_opt_1246.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_opt_14_44.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_opt_36_10.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_bin_cnt.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_carrier_sense.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_clk_cntl.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_clk_gen.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_clock_crosser.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_colision_detect.v
DE2_115_WEB_SERVER_MII_ENET1/de2_11
DE2_115_WEB_SERVER_MII_ENET1/.qsys_edit/preferences.xml
DE2_115_WEB_SERVER_MII_ENET1/ddr_o.bsf
DE2_115_WEB_SERVER_MII_ENET1/ddr_o.qip
DE2_115_WEB_SERVER_MII_ENET1/ddr_o.v
DE2_115_WEB_SERVER_MII_ENET1/ddr_o_bb.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_golden_sopc.sdc
DE2_115_WEB_SERVER_MII_ENET1/de2_115_golden_sopc.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/de2_115_WEB_Qsys.qip
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/de2_115_WEB_Qsys.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_dc_fifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_mm_clock_crossing_bridge.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_sc_fifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_st_clock_crosser.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_dcfifo_synchronizer_bundle.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_irq_clock_crosser.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_arbitrator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_burst_adapter.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_master_agent.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_master_translator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_slave_agent.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_slave_translator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_std_arbitrator_core.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_traffic_limiter.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_merlin_width_adapter.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_reset_controller.sdc
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_reset_controller.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_reset_synchronizer.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tristate_controller_aggregator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tristate_controller_translator.sv
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_align_sync.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_arriagx.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_basic.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_gige.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt2gxb_gige_wo_rmfifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt4gxb_gige.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_alt4gxb_gige_wo_rmfifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altgx_civgx_gige.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altgx_civgx_gige_wo_rmfifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altshifttaps.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_altsyncram_dpm_fifo.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_avst_to_gmii_if.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_13.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_24.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_34.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_opt_1246.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_opt_14_44.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_a_fifo_opt_36_10.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_bin_cnt.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_carrier_sense.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_clk_cntl.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_clk_gen.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_clock_crosser.v
DE2_115_WEB_SERVER_MII_ENET1/de2_115_WEB_Qsys/synthesis/submodules/altera_tse_colision_detect.v
DE2_115_WEB_SERVER_MII_ENET1/de2_11
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