文件名称:emif2mcbsp
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在fpga上编写的emif和mcbsp接口程序,是一个项目的一部分,只是用于测试用,能正确传输数据-Emif and MCBSP interface program written on fpga, is a part of the project, just for test, to transmit data correctly
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下载文件列表
emif2mcbsp/
emif2mcbsp/_ngo/
emif2mcbsp/_ngo/netlist.lst
emif2mcbsp/_xmsgs/
emif2mcbsp/_xmsgs/bitgen.xmsgs
emif2mcbsp/_xmsgs/map.xmsgs
emif2mcbsp/_xmsgs/ngdbuild.xmsgs
emif2mcbsp/_xmsgs/par.xmsgs
emif2mcbsp/_xmsgs/pn_parser.xmsgs
emif2mcbsp/_xmsgs/trce.xmsgs
emif2mcbsp/_xmsgs/xst.xmsgs
emif2mcbsp/emif2mcbsp.bgn
emif2mcbsp/emif2mcbsp.bit
emif2mcbsp/emif2mcbsp.bld
emif2mcbsp/emif2mcbsp.cmd_log
emif2mcbsp/emif2mcbsp.cpj
emif2mcbsp/emif2mcbsp.drc
emif2mcbsp/emif2mcbsp.gise
emif2mcbsp/emif2mcbsp.lso
emif2mcbsp/emif2mcbsp.ncd
emif2mcbsp/emif2mcbsp.ngc
emif2mcbsp/emif2mcbsp.ngd
emif2mcbsp/emif2mcbsp.ngr
emif2mcbsp/emif2mcbsp.pad
emif2mcbsp/emif2mcbsp.par
emif2mcbsp/emif2mcbsp.pcf
emif2mcbsp/emif2mcbsp.prj
emif2mcbsp/emif2mcbsp.ptwx
emif2mcbsp/emif2mcbsp.stx
emif2mcbsp/emif2mcbsp.syr
emif2mcbsp/emif2mcbsp.twr
emif2mcbsp/emif2mcbsp.twx
emif2mcbsp/emif2mcbsp.unroutes
emif2mcbsp/emif2mcbsp.ut
emif2mcbsp/emif2mcbsp.xise
emif2mcbsp/emif2mcbsp.xpi
emif2mcbsp/emif2mcbsp.xst
emif2mcbsp/emif2mcbsp_bitgen.xwbt
emif2mcbsp/emif2mcbsp_envsettings.html
emif2mcbsp/emif2mcbsp_guide.ncd
emif2mcbsp/emif2mcbsp_map.map
emif2mcbsp/emif2mcbsp_map.mrp
emif2mcbsp/emif2mcbsp_map.ncd
emif2mcbsp/emif2mcbsp_map.ngm
emif2mcbsp/emif2mcbsp_map.xrpt
emif2mcbsp/emif2mcbsp_ngdbuild.xrpt
emif2mcbsp/emif2mcbsp_pad.csv
emif2mcbsp/emif2mcbsp_pad.txt
emif2mcbsp/emif2mcbsp_par.xrpt
emif2mcbsp/emif2mcbsp_summary.html
emif2mcbsp/emif2mcbsp_summary.xml
emif2mcbsp/emif2mcbsp_usage.xml
emif2mcbsp/emif2mcbsp_xst.xrpt
emif2mcbsp/ipcore_dir/
emif2mcbsp/ipcore_dir/fifo_2k/
emif2mcbsp/ipcore_dir/fifo_2k/_xmsgs/
emif2mcbsp/ipcore_dir/fifo_2k/_xmsgs/cg.xmsgs
emif2mcbsp/ipcore_dir/fifo_2k/_xmsgs/pn_parser.xmsgs
emif2mcbsp/ipcore_dir/fifo_2k/coregen.cgp
emif2mcbsp/ipcore_dir/fifo_2k/coregen.log
emif2mcbsp/ipcore_dir/fifo_2k/create_fifo_2k.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/fifo_generator_v9_3_readme.txt
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/fifo_generator_v9_3_vinfo.html
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/pg057-fifo-generator.pdf
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/example_design/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/example_design/fifo_2k_exdes.ucf
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/example_design/fifo_2k_exdes.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/fifo_generator_v9_3_readme.txt
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement_synplify.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement_synplify.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/planAhead_ise.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/planAhead_ise.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/planAhead_ise.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/xst.prj
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/xst.scr
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_dgen.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_dverif.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_pctrl.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_pkg.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_rng.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_synth.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_tb.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_isim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_isim.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_mti.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_mti.do
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_mti.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_ncsim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_vcs.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/ucli_commands.key
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/vcs_session.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/wave_isim.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/wave_mti.do
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/wave_ncsim.sv
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_isim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_isim.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_mti.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_mti.do
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_mti.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_ncsim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_vcs.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/ucli_commands
emif2mcbsp/_ngo/
emif2mcbsp/_ngo/netlist.lst
emif2mcbsp/_xmsgs/
emif2mcbsp/_xmsgs/bitgen.xmsgs
emif2mcbsp/_xmsgs/map.xmsgs
emif2mcbsp/_xmsgs/ngdbuild.xmsgs
emif2mcbsp/_xmsgs/par.xmsgs
emif2mcbsp/_xmsgs/pn_parser.xmsgs
emif2mcbsp/_xmsgs/trce.xmsgs
emif2mcbsp/_xmsgs/xst.xmsgs
emif2mcbsp/emif2mcbsp.bgn
emif2mcbsp/emif2mcbsp.bit
emif2mcbsp/emif2mcbsp.bld
emif2mcbsp/emif2mcbsp.cmd_log
emif2mcbsp/emif2mcbsp.cpj
emif2mcbsp/emif2mcbsp.drc
emif2mcbsp/emif2mcbsp.gise
emif2mcbsp/emif2mcbsp.lso
emif2mcbsp/emif2mcbsp.ncd
emif2mcbsp/emif2mcbsp.ngc
emif2mcbsp/emif2mcbsp.ngd
emif2mcbsp/emif2mcbsp.ngr
emif2mcbsp/emif2mcbsp.pad
emif2mcbsp/emif2mcbsp.par
emif2mcbsp/emif2mcbsp.pcf
emif2mcbsp/emif2mcbsp.prj
emif2mcbsp/emif2mcbsp.ptwx
emif2mcbsp/emif2mcbsp.stx
emif2mcbsp/emif2mcbsp.syr
emif2mcbsp/emif2mcbsp.twr
emif2mcbsp/emif2mcbsp.twx
emif2mcbsp/emif2mcbsp.unroutes
emif2mcbsp/emif2mcbsp.ut
emif2mcbsp/emif2mcbsp.xise
emif2mcbsp/emif2mcbsp.xpi
emif2mcbsp/emif2mcbsp.xst
emif2mcbsp/emif2mcbsp_bitgen.xwbt
emif2mcbsp/emif2mcbsp_envsettings.html
emif2mcbsp/emif2mcbsp_guide.ncd
emif2mcbsp/emif2mcbsp_map.map
emif2mcbsp/emif2mcbsp_map.mrp
emif2mcbsp/emif2mcbsp_map.ncd
emif2mcbsp/emif2mcbsp_map.ngm
emif2mcbsp/emif2mcbsp_map.xrpt
emif2mcbsp/emif2mcbsp_ngdbuild.xrpt
emif2mcbsp/emif2mcbsp_pad.csv
emif2mcbsp/emif2mcbsp_pad.txt
emif2mcbsp/emif2mcbsp_par.xrpt
emif2mcbsp/emif2mcbsp_summary.html
emif2mcbsp/emif2mcbsp_summary.xml
emif2mcbsp/emif2mcbsp_usage.xml
emif2mcbsp/emif2mcbsp_xst.xrpt
emif2mcbsp/ipcore_dir/
emif2mcbsp/ipcore_dir/fifo_2k/
emif2mcbsp/ipcore_dir/fifo_2k/_xmsgs/
emif2mcbsp/ipcore_dir/fifo_2k/_xmsgs/cg.xmsgs
emif2mcbsp/ipcore_dir/fifo_2k/_xmsgs/pn_parser.xmsgs
emif2mcbsp/ipcore_dir/fifo_2k/coregen.cgp
emif2mcbsp/ipcore_dir/fifo_2k/coregen.log
emif2mcbsp/ipcore_dir/fifo_2k/create_fifo_2k.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/fifo_generator_v9_3_readme.txt
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/fifo_generator_v9_3_vinfo.html
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/doc/pg057-fifo-generator.pdf
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/example_design/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/example_design/fifo_2k_exdes.ucf
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/example_design/fifo_2k_exdes.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/fifo_generator_v9_3_readme.txt
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement_synplify.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/implement_synplify.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/planAhead_ise.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/planAhead_ise.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/planAhead_ise.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/xst.prj
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/implement/xst.scr
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_dgen.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_dverif.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_pctrl.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_pkg.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_rng.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_synth.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/fifo_2k_tb.vhd
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_isim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_isim.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_mti.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_mti.do
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_mti.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_ncsim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/simulate_vcs.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/ucli_commands.key
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/vcs_session.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/wave_isim.tcl
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/wave_mti.do
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/functional/wave_ncsim.sv
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_isim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_isim.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_mti.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_mti.do
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_mti.sh
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_ncsim.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/simulate_vcs.bat
emif2mcbsp/ipcore_dir/fifo_2k/fifo_2k/simulation/timing/ucli_commands
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