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文件名称:pulse_generation

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2014-10-03
  • 文件大小：
    4.86mb
  • 已下载：
    0次
  • 提 供 者：
    吕****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

一个小的激光驱动电路，调用PLL锁相环，可以产生不同脉宽，实现占空比可调-Pulse generation, Verilog written. Though simple, but I hope you will help
(系统自动生成,下载前可以参看下载内容)

下载文件列表

pulse_generation/AD_clk.qip
pulse_generation/db/logic_util_heursitic.dat
pulse_generation/db/PLL_1.(0).cnf.cdb
pulse_generation/db/PLL_1.(0).cnf.hdb
pulse_generation/db/PLL_1.(1).cnf.cdb
pulse_generation/db/PLL_1.(1).cnf.hdb
pulse_generation/db/PLL_1.(2).cnf.cdb
pulse_generation/db/PLL_1.(2).cnf.hdb
pulse_generation/db/PLL_1.(3).cnf.cdb
pulse_generation/db/PLL_1.(3).cnf.hdb
pulse_generation/db/PLL_1.cbx.xml
pulse_generation/db/PLL_1.cmp.rdb
pulse_generation/db/PLL_1.cmp_merge.kpt
pulse_generation/db/PLL_1.db_info
pulse_generation/db/PLL_1.hier_info
pulse_generation/db/PLL_1.hif
pulse_generation/db/PLL_1.ipinfo
pulse_generation/db/PLL_1.lpc.html
pulse_generation/db/PLL_1.lpc.rdb
pulse_generation/db/PLL_1.lpc.txt
pulse_generation/db/PLL_1.map.ammdb
pulse_generation/db/PLL_1.map.bpm
pulse_generation/db/PLL_1.map.cdb
pulse_generation/db/PLL_1.map.hdb
pulse_generation/db/PLL_1.map.kpt
pulse_generation/db/PLL_1.map.logdb
pulse_generation/db/PLL_1.map.qmsg
pulse_generation/db/PLL_1.map.rdb
pulse_generation/db/PLL_1.map_bb.cdb
pulse_generation/db/PLL_1.map_bb.hdb
pulse_generation/db/PLL_1.map_bb.logdb
pulse_generation/db/PLL_1.pre_map.hdb
pulse_generation/db/PLL_1.pti_db_list.ddb
pulse_generation/db/PLL_1.root_partition.map.reg_db.cdb
pulse_generation/db/PLL_1.rtlv.hdb
pulse_generation/db/PLL_1.rtlv_sg.cdb
pulse_generation/db/PLL_1.rtlv_sg_swap.cdb
pulse_generation/db/PLL_1.sgdiff.cdb
pulse_generation/db/PLL_1.sgdiff.hdb
pulse_generation/db/PLL_1.sld_design_entry.sci
pulse_generation/db/PLL_1.sld_design_entry_dsc.sci
pulse_generation/db/PLL_1.smart_action.txt
pulse_generation/db/PLL_1.syn_hier_info
pulse_generation/db/PLL_1.tis_db_list.ddb
pulse_generation/db/PLL_1.tmw_info
pulse_generation/db/pll_1_altpll.v
pulse_generation/db/prev_cmp_PLL_1.qmsg
pulse_generation/greybox_tmp/cbx_args.txt
pulse_generation/incremental_db/compiled_partitions/PLL_1.db_info
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.cmp.dfp
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.cmp.kpt
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.cmp.logdb
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.cdb
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.dpi
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.hbdb.cdb
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.hbdb.hb_info
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.hbdb.hdb
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.hbdb.sig
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.hdb
pulse_generation/incremental_db/compiled_partitions/PLL_1.root_partition.map.kpt
pulse_generation/incremental_db/README
pulse_generation/modelsim.ini
pulse_generation/msim_transcript
pulse_generation/PLLJ_PLLSPE_INFO.txt
pulse_generation/PLL_1.asm.rpt
pulse_generation/pll_1.bsf
pulse_generation/PLL_1.cdf
pulse_generation/pll_1.cmp
pulse_generation/PLL_1.done
pulse_generation/PLL_1.eda.rpt
pulse_generation/PLL_1.fit.rpt
pulse_generation/PLL_1.fit.smsg
pulse_generation/PLL_1.fit.summary
pulse_generation/PLL_1.flow.rpt
pulse_generation/pll_1.inc
pulse_generation/PLL_1.map.rpt
pulse_generation/PLL_1.map.smsg
pulse_generation/PLL_1.map.summary
pulse_generation/PLL_1.pin
pulse_generation/PLL_1.pof
pulse_generation/pll_1.ppf
pulse_generation/pll_1.qip
pulse_generation/PLL_1.qpf
pulse_generation/PLL_1.qsf
pulse_generation/PLL_1.qsf.bak
pulse_generation/PLL_1.qws
pulse_generation/PLL_1.sof
pulse_generation/PLL_1.sta.rpt
pulse_generation/PLL_1.sta.summary
pulse_generation/pll_1.v
pulse_generation/PLL_1_assignment_defaults.qdf
pulse_generation/pll_1_bb.v
pulse_generation/pll_1_inst.v
pulse_generation/PLL_1_nativelink_simulation.rpt
pulse_generation/PLL_1_run_msim_rtl_verilog.do
pulse_generation/PLL_1_run_msim_rtl_verilog.do.bak
pulse_generation/PLL_1_run_msim_rtl_verilog.do.bak1
pulse_generation/PLL_1_run_msim_rtl_verilog.do.bak2
pulse_generation/PLL_1_run_msim_rtl_verilog.do.bak3
pulse_generation/RTL/greybox_tmp/cbx_args.txt
pulse_generation/RTL/pll_1.qip
pulse_generation/RTL/PLL_1.v
pulse_generation/RTL/PLL_1.v.bak
pulse_generation/rtl_work/@p@l@l_1/_primary.dat
pulse_generation/rtl_work/@p@l@l_1/_primary.dbs
pulse_generation/rtl_work/@p@l@l_1/_primary.vhd
pulse_generation/rtl_work/@p@l@l_1_vlg_tst/_primary.dat
pulse_generation/rtl_work/@p@l@l_1_vlg_tst/_primary.dbs
pulse_generation/rtl_work/@p@l@l_1_vlg_tst/_primary.vhd
pulse_generation/rtl_work/@_opt/vopt06x4ib
pulse_generation/rtl_work/@_opt/vopt0je2sm
pulse_generation/rtl_work/@_opt/vopt1a25c8
pulse_generation/rtl_work/@_opt/vopt1xg75y
pulse_generation/rtl_work/@_opt/vopt21n7zt
pulse_generation/rtl_work/@_opt/vopt2k4arg
pulse_generation/rtl_work/@_opt/vopt3brcb3
pulse_generation/rtl_work/@_opt/vopt3r9aid
pulse_generation/rtl_work/@_opt/vopt42cfym
pulse_generation/rtl_work/@_opt/vopt4fxc50
pulse_generation/rtl_work/@_opt/vopt56hfri
pulse_generation/rtl_work/@_opt/vopt5szhh8
pulse_generation/rtl_work/@_opt/vopt632qxg
pul

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