文件名称:VLSI-Lab
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- 上传时间:2014-10-18
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文件大小:7.04mb
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VLSI Lab: design FA,counter, inverter, dflipflop, NAND gate, -VLSI Lab: design FA,counter, inverter, dflipflop, NAND gate, ...
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下载文件列表
VLSI Lab/
VLSI Lab/Part A/
VLSI Lab/Part A/4bit-counter/
VLSI Lab/Part A/4bit-counter/bincntr.v
VLSI Lab/Part A/4bit-counter/counter.pex.netlist
VLSI Lab/Part A/4bit-counter/counter.testbench.v
VLSI Lab/Part A/dFlipFlop/
VLSI Lab/Part A/dFlipFlop/dFlipFlop.pex.netlist
VLSI Lab/Part A/dFlipFlop/dFlipFlop.testbench.v
VLSI Lab/Part A/dFlipFlop/dFlipFlop.v
VLSI Lab/Part A/fullAdder/
VLSI Lab/Part A/fullAdder/fullAdder.pex.netlist
VLSI Lab/Part A/fullAdder/fullAdder.testbench.v
VLSI Lab/Part A/fullAdder/fullAdder.v
VLSI Lab/Part A/Inverter/
VLSI Lab/Part A/Inverter/inv.pex.netlist
VLSI Lab/Part A/Inverter/inv.testbench.v
VLSI Lab/Part A/Inverter/inv.v
VLSI Lab/Part A/jkFlipFlop/
VLSI Lab/Part A/jkFlipFlop/jkFlipFlop.pex.netlist
VLSI Lab/Part A/jkFlipFlop/jkFlipFlop.testbench.v
VLSI Lab/Part A/jkFlipFlop/jkFlipFlop.v
VLSI Lab/Part A/NAND/
VLSI Lab/Part A/NAND/nand.pex.netlist
VLSI Lab/Part A/NAND/nand.testbench.v
VLSI Lab/Part A/NAND/nand.v
VLSI Lab/Part A/OR/
VLSI Lab/Part A/OR/or.pex.netlist
VLSI Lab/Part A/OR/or.testbench.v
VLSI Lab/Part A/OR/or.v
VLSI Lab/Part A/tFlipFlop/
VLSI Lab/Part A/tFlipFlop/tFlipFlop.pex.netlist
VLSI Lab/Part A/tFlipFlop/tFlipFlop.testbench.v
VLSI Lab/Part A/tFlipFlop/tFlipFlop.v
VLSI Lab/Part B/
VLSI Lab/Part B/commonSource/
VLSI Lab/Part B/commonSource/commonSource-pavan.jpg
VLSI Lab/Part B/commonSource/commonSource.spice.netlist.cir
VLSI Lab/Part B/inverter/
VLSI Lab/Part B/inverter/inv-pavan.jpg
VLSI Lab/Part B/inverter/inv.spice.netlist.cir
VLSI Lab/Part B/NAND/
VLSI Lab/Part B/NAND/NAND-pavan.jpg
VLSI Lab/Part B/NAND/nand.spice netlist.cir
VLSI Lab/Part B/NOR/
VLSI Lab/Part B/NOR/nor-pavan.jpg
VLSI Lab/Part B/NOR/nor.spice.netlist.cir
VLSI Lab/Part B/opamp/
VLSI Lab/Part B/opamp/opamp.spice.netlist.cir
VLSI Lab/ReadMe.txt
VLSI Lab/Part A/
VLSI Lab/Part A/4bit-counter/
VLSI Lab/Part A/4bit-counter/bincntr.v
VLSI Lab/Part A/4bit-counter/counter.pex.netlist
VLSI Lab/Part A/4bit-counter/counter.testbench.v
VLSI Lab/Part A/dFlipFlop/
VLSI Lab/Part A/dFlipFlop/dFlipFlop.pex.netlist
VLSI Lab/Part A/dFlipFlop/dFlipFlop.testbench.v
VLSI Lab/Part A/dFlipFlop/dFlipFlop.v
VLSI Lab/Part A/fullAdder/
VLSI Lab/Part A/fullAdder/fullAdder.pex.netlist
VLSI Lab/Part A/fullAdder/fullAdder.testbench.v
VLSI Lab/Part A/fullAdder/fullAdder.v
VLSI Lab/Part A/Inverter/
VLSI Lab/Part A/Inverter/inv.pex.netlist
VLSI Lab/Part A/Inverter/inv.testbench.v
VLSI Lab/Part A/Inverter/inv.v
VLSI Lab/Part A/jkFlipFlop/
VLSI Lab/Part A/jkFlipFlop/jkFlipFlop.pex.netlist
VLSI Lab/Part A/jkFlipFlop/jkFlipFlop.testbench.v
VLSI Lab/Part A/jkFlipFlop/jkFlipFlop.v
VLSI Lab/Part A/NAND/
VLSI Lab/Part A/NAND/nand.pex.netlist
VLSI Lab/Part A/NAND/nand.testbench.v
VLSI Lab/Part A/NAND/nand.v
VLSI Lab/Part A/OR/
VLSI Lab/Part A/OR/or.pex.netlist
VLSI Lab/Part A/OR/or.testbench.v
VLSI Lab/Part A/OR/or.v
VLSI Lab/Part A/tFlipFlop/
VLSI Lab/Part A/tFlipFlop/tFlipFlop.pex.netlist
VLSI Lab/Part A/tFlipFlop/tFlipFlop.testbench.v
VLSI Lab/Part A/tFlipFlop/tFlipFlop.v
VLSI Lab/Part B/
VLSI Lab/Part B/commonSource/
VLSI Lab/Part B/commonSource/commonSource-pavan.jpg
VLSI Lab/Part B/commonSource/commonSource.spice.netlist.cir
VLSI Lab/Part B/inverter/
VLSI Lab/Part B/inverter/inv-pavan.jpg
VLSI Lab/Part B/inverter/inv.spice.netlist.cir
VLSI Lab/Part B/NAND/
VLSI Lab/Part B/NAND/NAND-pavan.jpg
VLSI Lab/Part B/NAND/nand.spice netlist.cir
VLSI Lab/Part B/NOR/
VLSI Lab/Part B/NOR/nor-pavan.jpg
VLSI Lab/Part B/NOR/nor.spice.netlist.cir
VLSI Lab/Part B/opamp/
VLSI Lab/Part B/opamp/opamp.spice.netlist.cir
VLSI Lab/ReadMe.txt
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