文件名称:SPISlavetoPWMGeneration-Source.ZIP
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- 上传时间：2014-11-11
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文件大小：106.98kb
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SPI convert to PWM for CPLd
(系统自动生成,下载前可以参看下载内容)
下载文件列表
RD1107/docs/
RD1107/docs/RD1107.pdf
RD1107/docs/rd1107_readme.txt
RD1107/project/
RD1107/project/spi_to_pwm.lpf
RD1107/simulation/
RD1107/simulation/verilog/
RD1107/simulation/verilog/rtl_verilog.do
RD1107/simulation/verilog/timing_verilog.do
RD1107/source/
RD1107/source/verilog/
RD1107/source/verilog/counter.v
RD1107/source/verilog/spi_slave.v
RD1107/source/verilog/spi_to_pwm_top.v
RD1107/testbench/
RD1107/testbench/verilog/
RD1107/testbench/verilog/spi_to_pwm_tb.v
RD1107/testbench/verilog/spi_wb.v
RD1107/docs/RD1107.pdf
RD1107/docs/rd1107_readme.txt
RD1107/project/
RD1107/project/spi_to_pwm.lpf
RD1107/simulation/
RD1107/simulation/verilog/
RD1107/simulation/verilog/rtl_verilog.do
RD1107/simulation/verilog/timing_verilog.do
RD1107/source/
RD1107/source/verilog/
RD1107/source/verilog/counter.v
RD1107/source/verilog/spi_slave.v
RD1107/source/verilog/spi_to_pwm_top.v
RD1107/testbench/
RD1107/testbench/verilog/
RD1107/testbench/verilog/spi_to_pwm_tb.v
RD1107/testbench/verilog/spi_wb.v
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