74HC595[1] 是硅结构的CMOS器件， 兼容低电压TTL电路，遵守JEDEC标准。 74HC595是具有8位移位寄存器和一个存储器，三态输出功能。 移位寄存器和存储器是分别的时钟。 数据在SHcp（移位寄存器时钟输入）的上升沿输入到移位寄存器中，在STcp（存储器时钟输入）的上升沿输入到存储寄存器中去。如果两个时钟连在一起，则移位寄存器总是比存储寄存器早一个脉冲。 移位寄存器有一个串行移位输入（Ds），和一个串行输出（Q7’）,和一个异步的低电平复位，存储寄存器有一个并行8位的，具备三态的总线输出，当使能OE时（为低电平），存储寄存器的数据输出到总线。-74HC595 is a silicon CMOS device structure, compatible with low-voltage TTL circuits, to comply with JEDEC standards. 74HC595 is an 8-bit shift register and a memory, tri-state output. Shift register and the memory clock, respectively. At the rising edge SHcp (shift register clock input) is input to the shift register at the rising edge STcp (memory clock input) is input to storage register. If the two clocks together, the shift register is always earlier than the storage register a pulse. There is a serial shift register shift input (Ds), and a serial output (Q7　), and a low-level asynchronous reset, there is a parallel storage register of eight, with three-state bus output, when when OE is enabled (low), the data storage register is output to the bus.