文件名称:Day-1-Training-Material
-
所属分类:
- 标签属性:
- 上传时间:2015-01-14
-
文件大小:18.72mb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
OneSpin培训资料
OneSpin用于做断言验证。-OneSpin training material is used to study assertion verification in ASIC design.
OneSpin用于做断言验证。-OneSpin training material is used to study assertion verification in ASIC design.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
NSN-day1/labs/
NSN-day1/labs/1-setup/
NSN-day1/labs/1-setup/.solutions/
NSN-day1/labs/1-setup/.solutions/setup_1_vhdl_arbiter/
NSN-day1/labs/1-setup/.solutions/setup_1_vhdl_arbiter/arbiter.vhd
NSN-day1/labs/1-setup/.solutions/setup_1_vhdl_arbiter/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/cells.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/cfg_reg.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/dff.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/projectpack.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/reg.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_3_verilog_arbiter/
NSN-day1/labs/1-setup/.solutions/setup_3_verilog_arbiter/arbiter.v
NSN-day1/labs/1-setup/.solutions/setup_3_verilog_arbiter/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/design.flist
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/entries
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/props/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/text-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/text-base/projectpack.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/props/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/text-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/projectpack.v
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/mylib.v
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/reg.v
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/setup_vlog.tcl
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/tsbvlib/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/tsbvlib/dff.tsbvlib
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/tsbvlib/reg4.tsbvlib
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/entries
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/props/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_arb.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_pri_enc.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_rf.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_sel.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_de.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_defines.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_inc30r.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_pri_enc_sub.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_rf.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_top.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_wb_if.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_wb_mast.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_wb_slv.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/props/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/text-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_arb.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_pri_enc.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_rf.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_sel.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_de.v
NSN-day1/labs/1-setup/.soluti
NSN-day1/labs/1-setup/
NSN-day1/labs/1-setup/.solutions/
NSN-day1/labs/1-setup/.solutions/setup_1_vhdl_arbiter/
NSN-day1/labs/1-setup/.solutions/setup_1_vhdl_arbiter/arbiter.vhd
NSN-day1/labs/1-setup/.solutions/setup_1_vhdl_arbiter/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/cells.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/cfg_reg.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/dff.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/projectpack.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/reg.vhd
NSN-day1/labs/1-setup/.solutions/setup_2_vhdl_w_hierarchy/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_3_verilog_arbiter/
NSN-day1/labs/1-setup/.solutions/setup_3_verilog_arbiter/arbiter.v
NSN-day1/labs/1-setup/.solutions/setup_3_verilog_arbiter/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/design.flist
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/entries
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/props/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/text-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/text-base/projectpack.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/props/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/.svn/tmp/text-base/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/include/projectpack.v
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/mylib.v
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/reg.v
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/setup.tcl
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/setup_vlog.tcl
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/tsbvlib/
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/tsbvlib/dff.tsbvlib
NSN-day1/labs/1-setup/.solutions/setup_4_verilog_w_libraries/tsbvlib/reg4.tsbvlib
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/entries
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/props/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_arb.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_pri_enc.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_rf.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_ch_sel.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_de.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_defines.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_inc30r.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_pri_enc_sub.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_rf.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_top.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_wb_if.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_wb_mast.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/text-base/wb_dma_wb_slv.v.svn-base
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/prop-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/props/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/.svn/tmp/text-base/
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_arb.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_pri_enc.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_rf.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_ch_sel.v
NSN-day1/labs/1-setup/.solutions/setup_5_wb_dma/rtl/verilog/wb_dma_de.v
NSN-day1/labs/1-setup/.soluti
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.