文件名称:I2C_Core_LV2010_3
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基于NI FPGA开发的I2C通信代码,可以烧录到FPGA中实现I2C通信,另有上位机程序 -I FPGA-based development code and I2C host computer code, can achieve I2C communication
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下载文件列表
I2C_Core/Controls/
I2C_Core/Controls/FPGA_Reference.ctl
I2C_Core/Controls/Host_I2CBus_Options.ctl
I2C_Core/Controls/I2C_Bus_State.ctl
I2C_Core/Controls/i2c_Protocol_Timing.ctl
I2C_Core/Controls/i2c_state.ctl
I2C_Core/Documentation/
I2C_Core/Documentation/How to Get Started with this Code.pdf
I2C_Core/Documentation/I2C Core for NI FPGA Modules_LV2010_(3).pdf
I2C_Core/Example/
I2C_Core/Example/EEPROM_Example_HelloWorld.vi
I2C_Core/Example/Example_TestStand2010_EEPROM-Testing.seq
I2C_Core/FPGA Bitfiles/
I2C_Core/FPGA Bitfiles/I2CCore_FPGATarget_I2CCore[Top-Leve_A21C0FC1.lvbitx
I2C_Core/FPGA/
I2C_Core/FPGA/I2C_Core_[Top-Level].vi
I2C_Core/FPGA/SubVIs/
I2C_Core/FPGA/SubVIs/I2C_IRQNotifyHost.vi
I2C_Core/FPGA/SubVIs/I2C_ReadBitFromSlave.vi
I2C_Core/FPGA/SubVIs/I2C_ReadByteFromSlave.vi
I2C_Core/FPGA/SubVIs/I2C_ReadReadMemoryBlock.vi
I2C_Core/FPGA/SubVIs/I2C_ReadSlaveACK.vi
I2C_Core/FPGA/SubVIs/I2C_Start.vi
I2C_Core/FPGA/SubVIs/I2C_Stop.vi
I2C_Core/FPGA/SubVIs/I2C_WriteBitToSlave.vi
I2C_Core/FPGA/SubVIs/I2C_WriteBytesToSlave.vi
I2C_Core/FPGA/SubVIs/I2C_WriteMasterACK.vi
I2C_Core/FPGA/SubVIs/I2C_WriteReadMemoryBlock.vi
I2C_Core/FPGA/SubVIs/I2C_WriteSlaveDeviceAddress.vi
I2C_Core/FPGA/SubVIs/I2C_WriteWriteMemoryBlock.vi
I2C_Core/Host/
I2C_Core/Host/I2C_Host_[Top-Level].vi
I2C_Core/Host/SubVIs/
I2C_Core/Host/SubVIs/I2C_Host_Read.vi
I2C_Core/Host/SubVIs/I2C_HostHandleIRQ.vi
I2C_Core/Host/SubVIs/I2C_HostWriteCMD-ParamMemory.vi
I2C_Core/I2C_Core.aliases
I2C_Core/I2C_Core.lvlps
I2C_Core/I2C_Core.lvproj
I2C_Core/Controls/FPGA_Reference.ctl
I2C_Core/Controls/Host_I2CBus_Options.ctl
I2C_Core/Controls/I2C_Bus_State.ctl
I2C_Core/Controls/i2c_Protocol_Timing.ctl
I2C_Core/Controls/i2c_state.ctl
I2C_Core/Documentation/
I2C_Core/Documentation/How to Get Started with this Code.pdf
I2C_Core/Documentation/I2C Core for NI FPGA Modules_LV2010_(3).pdf
I2C_Core/Example/
I2C_Core/Example/EEPROM_Example_HelloWorld.vi
I2C_Core/Example/Example_TestStand2010_EEPROM-Testing.seq
I2C_Core/FPGA Bitfiles/
I2C_Core/FPGA Bitfiles/I2CCore_FPGATarget_I2CCore[Top-Leve_A21C0FC1.lvbitx
I2C_Core/FPGA/
I2C_Core/FPGA/I2C_Core_[Top-Level].vi
I2C_Core/FPGA/SubVIs/
I2C_Core/FPGA/SubVIs/I2C_IRQNotifyHost.vi
I2C_Core/FPGA/SubVIs/I2C_ReadBitFromSlave.vi
I2C_Core/FPGA/SubVIs/I2C_ReadByteFromSlave.vi
I2C_Core/FPGA/SubVIs/I2C_ReadReadMemoryBlock.vi
I2C_Core/FPGA/SubVIs/I2C_ReadSlaveACK.vi
I2C_Core/FPGA/SubVIs/I2C_Start.vi
I2C_Core/FPGA/SubVIs/I2C_Stop.vi
I2C_Core/FPGA/SubVIs/I2C_WriteBitToSlave.vi
I2C_Core/FPGA/SubVIs/I2C_WriteBytesToSlave.vi
I2C_Core/FPGA/SubVIs/I2C_WriteMasterACK.vi
I2C_Core/FPGA/SubVIs/I2C_WriteReadMemoryBlock.vi
I2C_Core/FPGA/SubVIs/I2C_WriteSlaveDeviceAddress.vi
I2C_Core/FPGA/SubVIs/I2C_WriteWriteMemoryBlock.vi
I2C_Core/Host/
I2C_Core/Host/I2C_Host_[Top-Level].vi
I2C_Core/Host/SubVIs/
I2C_Core/Host/SubVIs/I2C_Host_Read.vi
I2C_Core/Host/SubVIs/I2C_HostHandleIRQ.vi
I2C_Core/Host/SubVIs/I2C_HostWriteCMD-ParamMemory.vi
I2C_Core/I2C_Core.aliases
I2C_Core/I2C_Core.lvlps
I2C_Core/I2C_Core.lvproj
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