文件名称:ep2c8ptft
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- 上传时间:2015-02-03
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文件大小:1.2mb
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EP2C8Q208 TFT LCD彩屏VHDL工程,含SDRAM、PLL等内容。-EP2C8Q208 TFT LCD color screen VHDL projects, including SDRAM, PLL and other content.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
timing_adapter_1_fifo.v
top.v
video_sync_generator.v
.sopc_builder/
.sopc_builder/filters.xml
db/
db/myLCD.cmp.rdb
db/myLCD.db_info
db/myLCD.restore.qmsg
incremental_db/
incremental_db/compiled_partitions/
incremental_db/compiled_partitions/myLCD.root_partition.map.atm
incremental_db/compiled_partitions/myLCD.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
ip/
ip/altera/
ip/altera/sopc_builder_ip/
ip/altera/sopc_builder_ip/altera_avalon_pixel_converter/
ip/altera/sopc_builder_ip/altera_avalon_pixel_converter/altera_avalon_pixel_converter.v
ip/altera/sopc_builder_ip/altera_avalon_pixel_converter/altera_avalon_pixel_converter_hw.tcl
ip/altera/sopc_builder_ip/altera_avalon_video_sync_generator/
ip/altera/sopc_builder_ip/altera_avalon_video_sync_generator/altera_avalon_video_sync_generator.v
ip/altera/sopc_builder_ip/altera_avalon_video_sync_generator/altera_avalon_video_sync_generator_hw.tcl
assignment_defaults.qdf
cpu_0.sdc
cpu_0.v
cpu_0_ic_tag_ram.mif
cpu_0_jtag_debug_module_sysclk.v
cpu_0_jtag_debug_module_tck.v
cpu_0_jtag_debug_module_wrapper.v
cpu_0_oci_test_bench.v
cpu_0_ociram_default_contents.mif
cpu_0_rf_ram_a.mif
cpu_0_rf_ram_b.mif
cpu_0_test_bench.v
jtag_uart_0.v
lcd_pixel_filo.v
lcd_sgdma.v
myLCD.qip
myLCD.qpf
myLCD.qsf
myLCD.restore.rpt
myLCD.sopc
myLCD.v
myLCD_burst_0.v
onchip_memory2_0.hex
onchip_memory2_0.v
out_directory_tmp.txt.tmp
pixel_converter.v
pll1.bsf
pll1.cmp
pll1.ppf
pll1.qip
pll1.vhd
PLLLCD.ppf
PLLLCD.qip
PLLLCD.v
PLLLCD_bb.v
sdram.v
sopc_add_qip_file.tcl
sopc_builder_log.txt
sysid.v
timing_adapter.v
timing_adapter_1.v
top.v
video_sync_generator.v
.sopc_builder/
.sopc_builder/filters.xml
db/
db/myLCD.cmp.rdb
db/myLCD.db_info
db/myLCD.restore.qmsg
incremental_db/
incremental_db/compiled_partitions/
incremental_db/compiled_partitions/myLCD.root_partition.map.atm
incremental_db/compiled_partitions/myLCD.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
ip/
ip/altera/
ip/altera/sopc_builder_ip/
ip/altera/sopc_builder_ip/altera_avalon_pixel_converter/
ip/altera/sopc_builder_ip/altera_avalon_pixel_converter/altera_avalon_pixel_converter.v
ip/altera/sopc_builder_ip/altera_avalon_pixel_converter/altera_avalon_pixel_converter_hw.tcl
ip/altera/sopc_builder_ip/altera_avalon_video_sync_generator/
ip/altera/sopc_builder_ip/altera_avalon_video_sync_generator/altera_avalon_video_sync_generator.v
ip/altera/sopc_builder_ip/altera_avalon_video_sync_generator/altera_avalon_video_sync_generator_hw.tcl
assignment_defaults.qdf
cpu_0.sdc
cpu_0.v
cpu_0_ic_tag_ram.mif
cpu_0_jtag_debug_module_sysclk.v
cpu_0_jtag_debug_module_tck.v
cpu_0_jtag_debug_module_wrapper.v
cpu_0_oci_test_bench.v
cpu_0_ociram_default_contents.mif
cpu_0_rf_ram_a.mif
cpu_0_rf_ram_b.mif
cpu_0_test_bench.v
jtag_uart_0.v
lcd_pixel_filo.v
lcd_sgdma.v
myLCD.qip
myLCD.qpf
myLCD.qsf
myLCD.restore.rpt
myLCD.sopc
myLCD.v
myLCD_burst_0.v
onchip_memory2_0.hex
onchip_memory2_0.v
out_directory_tmp.txt.tmp
pixel_converter.v
pll1.bsf
pll1.cmp
pll1.ppf
pll1.qip
pll1.vhd
PLLLCD.ppf
PLLLCD.qip
PLLLCD.v
PLLLCD_bb.v
sdram.v
sopc_add_qip_file.tcl
sopc_builder_log.txt
sysid.v
timing_adapter.v
timing_adapter_1.v
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