文件名称:QAM_verilog
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- 上传时间:2015-04-22
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文件大小:3.61kb
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基于FPGA的16QAM,用verilog编写,其中DDS为自己编写,含设计文件和testbench。已通过moldesim软件仿真。 -FPGA-based 16QAM, with verilog writing, including DDS for their preparation, including design files and testbench. Simulation software has been through moldesim.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
QAM_verilog/mul2.v
QAM_verilog/mydds.v
QAM_verilog/QAM.v
QAM_verilog/QAM_MOD.v
QAM_verilog/QAM_TB.v
QAM_verilog/readme.txt
QAM_verilog/SEQ.v
QAM_verilog
QAM_verilog/mydds.v
QAM_verilog/QAM.v
QAM_verilog/QAM_MOD.v
QAM_verilog/QAM_TB.v
QAM_verilog/readme.txt
QAM_verilog/SEQ.v
QAM_verilog
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