文件名称:mips16e.tar
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- 上传时间:2015-06-12
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文件大小:9.71mb
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使用verilog HDL编写的mips16e 16位cpu,按照mips16e官方说明编写-Use verilog HDL prepared mips16e 16 位 cpu, the official note has been prepared in accordance with mips16e
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下载文件列表
lab5/isim/test_isim_beh.exe.sim/work/m_17952984702955998364_1245251775.c
lab5/ipcore_dir/insmem/simulation/functional/simulate_mti.sh
lab5/lab5_map.xrpt
lab5/ipcore_dir/datamem/blk_mem_gen_v7_3_readme.txt
lab5/isim/test_isim_beh.exe.sim/work/m_09524832898024300462_4066630463.lin64.o
lab5/xst/work/vlg60/
lab5/ipcore_dir/insmem/simulation/functional/simulate_mti.do
lab5/ipcore_dir/insmem/simulation/timing/simcmds.tcl
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_18166792875774041790_1929636017.lin64.o
lab5/lab5_isim_beh1.wdb
lab5/xst/work/vlg74/_s_e_x_t_b_z.bin
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_17738287534884592592_0963091017.c
lab5/ipcore_dir/datamem.xco
lab5/xst/work/vlg60/_r_f.bin
lab5/isim/test_isim_beh.exe.sim/work/m_00149436265901155794_3062290408.didat
lab5/ipcore_dir/insmem/
lab5/isim/temp/lab5.sdb
lab5/ipcore_dir/datamem/doc/blk_mem_gen_v7_3_vinfo.html
lab5/isim/work/@s@e@x@t5to32.sdb
lab5/ipcore_dir/tmp/_xmsgs/xst.xmsgs
lab5/ipcore_dir/insmem/example_design/insmem_exdes.xdc
lab5/xst/work/vlg52/
lab5/lab5_xst.xrpt
lab5/isim/test_isim_beh.exe.sim/tmp_save/_1
lab5/xst/work/vlg58/
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_10066368518302646626_2504998035.didat
lab5/isim/lockfile
lab5/lab5_summary.xml
lab5/ipcore_dir/insmem/simulation/bmg_stim_gen.vhd
lab5/ipcore_dir/insmem/example_design/insmem_exdes.vhd
lab5/isim/work/@s@e@x@t@b@z.sdb
lab5/lab5_map.ncd
lab5/xst/work/vlg53/
lab5/xst/work/vlg54/
lab5/CU_stx_beh.prj
lab5/xst/work/vlg7D/insmem.bin
lab5/ipcore_dir/insmem/implement/planAhead_ise.tcl
lab5/lab5.ncd
lab5/ipcore_dir/insmem/simulation/timing/
lab5/ipcore_dir/tmp/datamem.lso
lab5/insmem.mif
lab5/ipcore_dir/insmem.ncf
lab5/isim/test_isim_beh.exe.sim/work/m_11830104244813481085_1733832700.didat
lab5/isim/temp/datamem.sdb
lab5/ipcore_dir/insmem/doc/blk_mem_gen_v7_3_vinfo.html
lab5/ipcore_dir/datamem/simulation/checker.vhd
lab5/lab5.ucf
lab5/ipcore_dir/datamem/implement/implement.bat
lab5/ipcore_dir/datamem/simulation/functional/ucli_commands.key
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_04284627112054182733_1054081540.c
lab5/ipcore_dir/insmem/simulation/addr_gen.vhd
lab5/ipcore_dir/insmem/simulation/insmem_tb.vhd
lab5/MUX1to2S.v
lab5/lab5.ut
lab5/ipcore_dir/insmem/doc/pg058-blk-mem-gen.pdf
lab5/isim/work/@p@c.sdb
lab5/isim/work/@s@e@x@t8to322.sdb
lab5/isim/test_isim_beh.exe.sim/work/
lab5/isim/test_isim_beh.exe.sim/work/m_01240716322862070024_3070211069.c
lab5/ipcore_dir/datamem/simulation/functional/simulate_ncsim.sh
lab5/ipcore_dir/insmem/implement/planAhead_ise.sh
lab5/ipcore_dir/insmem/doc/
lab5/MUX3to1.v
lab5/ipcore_dir/insmem/simulation/insmem_synth.vhd
lab5/isim/test_isim_beh.exe.sim/work/m_01717607070160354220_0523229081.lin64.o
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_10066368518302646626_3919113256.c
lab5/isim/temp/@m@u@x2to1.sdb
lab5/ipcore_dir/insmem/simulation/timing/wave_ncsim.sv
lab5/isim/test_isim_beh.exe.sim/work/m_04515456741453835173_3091584975.c
lab5/isim/test_isim_beh.exe.sim/tmp_save/
lab5/isim/test_isim_beh.exe.sim/work/m_06721868545454637852_4086256320.lin64.o
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_04284627112054182733_2131252444.c
lab5/isim/test_isim_beh.exe.sim/work/m_06025791531593034449_0082425023.lin64.o
lab5/lab5_ngdbuild.xrpt
lab5/ipcore_dir/datamem/simulation/functional/wave_ncsim.sv
lab5/ipcore_dir/datamem/simulation/functional/vcs_session.tcl
lab5/xst/work/vlg3D/
lab5/isim/test_isim_beh.exe.sim/work/m_04515456741453835173_3091584975.didat
lab5/lab5.bld
lab5/xst/work/vlg35/
lab5/test_isim_beh1.wdb
lab5/lab5_bitgen.xwbt
lab5/isim/temp/@divider50@m@hz1000.sdb
lab5/ipcore_dir/datamem.veo
lab5/ipcore_dir/datamem.asy
lab5/SEXT8to32.v
lab5/CU_isim_beh.exe
lab5/isim/work/test.sdb
lab5/ipcore_dir/datamem.ngc
lab5/xst/work/vlg30/
lab5/ipcore_dir/datamem.mif
lab5/ipcore_dir/datamem/simulation/random.vhd
lab5/ipcore_dir/tmp/_cg/
lab5/xst/dump.xst/lab5.prj/
lab5/xst/work/vlg54/lab5.bin
lab5/isim/work/@c@u.sdb
lab5/usage_statistics_webtalk.html
lab5/lab5_map.mrp
lab5/ipcore_dir/datamem/simulation/bmg_tb_pkg.vhd
lab5/isim/test_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.c
lab5/ipcore_dir/insmem/simulation/functional/ucli_commands.key
lab5/test_isim_beh.exe
lab5/isim/temp/@s@e@x@t5to32.sdb
lab5/isim.cmd
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_10066368518302646626_2504998035.c
lab5/isim/test_isim_beh.exe.sim/netId.dat
lab5/ipcore_dir/datamem/implement/implement.sh
lab5/xst/work/vlg2A/
lab5/ipcore_dir/insmem.v
lab5/isim/test_isim_beh.exe.sim/work/m_05829420733777226792_3662750778.lin64.o
lab5/ipcore_dir/insmem/blk_mem_gen_v7_3_readme.txt
lab5/lab5.stx
lab5/ipcore_dir/insmem.xise
lab5/ipcore_dir/datamem/simulation/functional/simulate_isim.sh
lab5/ipcore_dir/_xmsgs/pn_parser.xmsgs
lab5/PC.v
lab5/ipcore_dir/datamem/simulation/functional/simulate_vcs.sh
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_04284627112054182733_1054081540.didat
lab5/isim/work/@s@e@x@t@b.sdb
lab5/ipcore_dir/xlnx_auto_0_xdb/
lab5/isim/lockfile1
lab5/xst/work/vlg13/_m_u_x2to1_s.bin
lab5/ipcore_dir/insmem/example_design/
lab5/xst/dump.xst/l
lab5/ipcore_dir/insmem/simulation/functional/simulate_mti.sh
lab5/lab5_map.xrpt
lab5/ipcore_dir/datamem/blk_mem_gen_v7_3_readme.txt
lab5/isim/test_isim_beh.exe.sim/work/m_09524832898024300462_4066630463.lin64.o
lab5/xst/work/vlg60/
lab5/ipcore_dir/insmem/simulation/functional/simulate_mti.do
lab5/ipcore_dir/insmem/simulation/timing/simcmds.tcl
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_18166792875774041790_1929636017.lin64.o
lab5/lab5_isim_beh1.wdb
lab5/xst/work/vlg74/_s_e_x_t_b_z.bin
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_17738287534884592592_0963091017.c
lab5/ipcore_dir/datamem.xco
lab5/xst/work/vlg60/_r_f.bin
lab5/isim/test_isim_beh.exe.sim/work/m_00149436265901155794_3062290408.didat
lab5/ipcore_dir/insmem/
lab5/isim/temp/lab5.sdb
lab5/ipcore_dir/datamem/doc/blk_mem_gen_v7_3_vinfo.html
lab5/isim/work/@s@e@x@t5to32.sdb
lab5/ipcore_dir/tmp/_xmsgs/xst.xmsgs
lab5/ipcore_dir/insmem/example_design/insmem_exdes.xdc
lab5/xst/work/vlg52/
lab5/lab5_xst.xrpt
lab5/isim/test_isim_beh.exe.sim/tmp_save/_1
lab5/xst/work/vlg58/
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_10066368518302646626_2504998035.didat
lab5/isim/lockfile
lab5/lab5_summary.xml
lab5/ipcore_dir/insmem/simulation/bmg_stim_gen.vhd
lab5/ipcore_dir/insmem/example_design/insmem_exdes.vhd
lab5/isim/work/@s@e@x@t@b@z.sdb
lab5/lab5_map.ncd
lab5/xst/work/vlg53/
lab5/xst/work/vlg54/
lab5/CU_stx_beh.prj
lab5/xst/work/vlg7D/insmem.bin
lab5/ipcore_dir/insmem/implement/planAhead_ise.tcl
lab5/lab5.ncd
lab5/ipcore_dir/insmem/simulation/timing/
lab5/ipcore_dir/tmp/datamem.lso
lab5/insmem.mif
lab5/ipcore_dir/insmem.ncf
lab5/isim/test_isim_beh.exe.sim/work/m_11830104244813481085_1733832700.didat
lab5/isim/temp/datamem.sdb
lab5/ipcore_dir/insmem/doc/blk_mem_gen_v7_3_vinfo.html
lab5/ipcore_dir/datamem/simulation/checker.vhd
lab5/lab5.ucf
lab5/ipcore_dir/datamem/implement/implement.bat
lab5/ipcore_dir/datamem/simulation/functional/ucli_commands.key
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_04284627112054182733_1054081540.c
lab5/ipcore_dir/insmem/simulation/addr_gen.vhd
lab5/ipcore_dir/insmem/simulation/insmem_tb.vhd
lab5/MUX1to2S.v
lab5/lab5.ut
lab5/ipcore_dir/insmem/doc/pg058-blk-mem-gen.pdf
lab5/isim/work/@p@c.sdb
lab5/isim/work/@s@e@x@t8to322.sdb
lab5/isim/test_isim_beh.exe.sim/work/
lab5/isim/test_isim_beh.exe.sim/work/m_01240716322862070024_3070211069.c
lab5/ipcore_dir/datamem/simulation/functional/simulate_ncsim.sh
lab5/ipcore_dir/insmem/implement/planAhead_ise.sh
lab5/ipcore_dir/insmem/doc/
lab5/MUX3to1.v
lab5/ipcore_dir/insmem/simulation/insmem_synth.vhd
lab5/isim/test_isim_beh.exe.sim/work/m_01717607070160354220_0523229081.lin64.o
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_10066368518302646626_3919113256.c
lab5/isim/temp/@m@u@x2to1.sdb
lab5/ipcore_dir/insmem/simulation/timing/wave_ncsim.sv
lab5/isim/test_isim_beh.exe.sim/work/m_04515456741453835173_3091584975.c
lab5/isim/test_isim_beh.exe.sim/tmp_save/
lab5/isim/test_isim_beh.exe.sim/work/m_06721868545454637852_4086256320.lin64.o
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_04284627112054182733_2131252444.c
lab5/isim/test_isim_beh.exe.sim/work/m_06025791531593034449_0082425023.lin64.o
lab5/lab5_ngdbuild.xrpt
lab5/ipcore_dir/datamem/simulation/functional/wave_ncsim.sv
lab5/ipcore_dir/datamem/simulation/functional/vcs_session.tcl
lab5/xst/work/vlg3D/
lab5/isim/test_isim_beh.exe.sim/work/m_04515456741453835173_3091584975.didat
lab5/lab5.bld
lab5/xst/work/vlg35/
lab5/test_isim_beh1.wdb
lab5/lab5_bitgen.xwbt
lab5/isim/temp/@divider50@m@hz1000.sdb
lab5/ipcore_dir/datamem.veo
lab5/ipcore_dir/datamem.asy
lab5/SEXT8to32.v
lab5/CU_isim_beh.exe
lab5/isim/work/test.sdb
lab5/ipcore_dir/datamem.ngc
lab5/xst/work/vlg30/
lab5/ipcore_dir/datamem.mif
lab5/ipcore_dir/datamem/simulation/random.vhd
lab5/ipcore_dir/tmp/_cg/
lab5/xst/dump.xst/lab5.prj/
lab5/xst/work/vlg54/lab5.bin
lab5/isim/work/@c@u.sdb
lab5/usage_statistics_webtalk.html
lab5/lab5_map.mrp
lab5/ipcore_dir/datamem/simulation/bmg_tb_pkg.vhd
lab5/isim/test_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.c
lab5/ipcore_dir/insmem/simulation/functional/ucli_commands.key
lab5/test_isim_beh.exe
lab5/isim/temp/@s@e@x@t5to32.sdb
lab5/isim.cmd
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_10066368518302646626_2504998035.c
lab5/isim/test_isim_beh.exe.sim/netId.dat
lab5/ipcore_dir/datamem/implement/implement.sh
lab5/xst/work/vlg2A/
lab5/ipcore_dir/insmem.v
lab5/isim/test_isim_beh.exe.sim/work/m_05829420733777226792_3662750778.lin64.o
lab5/ipcore_dir/insmem/blk_mem_gen_v7_3_readme.txt
lab5/lab5.stx
lab5/ipcore_dir/insmem.xise
lab5/ipcore_dir/datamem/simulation/functional/simulate_isim.sh
lab5/ipcore_dir/_xmsgs/pn_parser.xmsgs
lab5/PC.v
lab5/ipcore_dir/datamem/simulation/functional/simulate_vcs.sh
lab5/isim/test_isim_beh.exe.sim/xilinxcorelib_ver/m_04284627112054182733_1054081540.didat
lab5/isim/work/@s@e@x@t@b.sdb
lab5/ipcore_dir/xlnx_auto_0_xdb/
lab5/isim/lockfile1
lab5/xst/work/vlg13/_m_u_x2to1_s.bin
lab5/ipcore_dir/insmem/example_design/
lab5/xst/dump.xst/l
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