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文件名称:BMD_PCIE

  • 所属分类：
    Other systems
  • 标签属性：
    [PDF]
  • 上传时间：
    2015-10-19
  • 文件大小：
    10.55mb
  • 已下载：
    0次
  • 提 供 者：
    not****
  • 相关连接：
    无
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    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

自己根据xapp1052修改的源代码，已经编译成功，并应用在开发板上。-According xapp1052 own modified source code has been successfully compiled and used in the development board.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

BMD_PCIE/cdc/1.cpj
BMD_PCIE/cdc/trn_mon.cdc
BMD_PCIE/ip/bmd_design/doc/s6_pcie_ds718.pdf
BMD_PCIE/ip/bmd_design/doc/s6_pcie_ug654.pdf
BMD_PCIE/ip/bmd_design/example_design/pcie_app_s6.v
BMD_PCIE/ip/bmd_design/example_design/PIO.v
BMD_PCIE/ip/bmd_design/example_design/PIO_32_RX_ENGINE.v
BMD_PCIE/ip/bmd_design/example_design/PIO_32_TX_ENGINE.v
BMD_PCIE/ip/bmd_design/example_design/PIO_EP.v
BMD_PCIE/ip/bmd_design/example_design/PIO_EP_MEM.v
BMD_PCIE/ip/bmd_design/example_design/PIO_EP_MEM_ACCESS.v
BMD_PCIE/ip/bmd_design/example_design/PIO_TO_CTRL.v
BMD_PCIE/ip/bmd_design/example_design/xilinx_pcie_1_1_ep_s6.v
BMD_PCIE/ip/bmd_design/example_design/xilinx_pcie_1_lane_ep_xc6slx45t-fgg484-2.ucf
BMD_PCIE/ip/bmd_design/implement/implement.bat
BMD_PCIE/ip/bmd_design/implement/implement.sh
BMD_PCIE/ip/bmd_design/implement/xst.prj
BMD_PCIE/ip/bmd_design/implement/xst.scr
BMD_PCIE/ip/bmd_design/s6_pcie_readme.txt
BMD_PCIE/ip/bmd_design/simulation/dsport/gtx_drp_chanalign_fix_3752_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/gtx_rx_valid_filter_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/gtx_tx_sync_rate_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/gtx_wrapper_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_2_0_rport_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_2_0_v6_rp.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_brams_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_bram_top_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_bram_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_clocking_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_gtx_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_pipe_lane_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_pipe_misc_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_pipe_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_reset_delay_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pcie_upconfig_fix_3451_v6.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pci_exp_usrapp_cfg.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pci_exp_usrapp_com.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pci_exp_usrapp_pl.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pci_exp_usrapp_rx.v
BMD_PCIE/ip/bmd_design/simulation/dsport/pci_exp_usrapp_tx.v
BMD_PCIE/ip/bmd_design/simulation/dsport/xilinx_pcie_2_0_rport_v6.v
BMD_PCIE/ip/bmd_design/simulation/functional/board.f
BMD_PCIE/ip/bmd_design/simulation/functional/board.v
BMD_PCIE/ip/bmd_design/simulation/functional/isim_cmd.tcl
BMD_PCIE/ip/bmd_design/simulation/functional/simulate_isim.bat
BMD_PCIE/ip/bmd_design/simulation/functional/simulate_isim.sh
BMD_PCIE/ip/bmd_design/simulation/functional/simulate_mti.do
BMD_PCIE/ip/bmd_design/simulation/functional/simulate_ncsim.sh
BMD_PCIE/ip/bmd_design/simulation/functional/simulate_vcs.sh
BMD_PCIE/ip/bmd_design/simulation/functional/sys_clk_gen.v
BMD_PCIE/ip/bmd_design/simulation/functional/sys_clk_gen_ds.v
BMD_PCIE/ip/bmd_design/simulation/functional/wave.do
BMD_PCIE/ip/bmd_design/simulation/functional/wave.sv
BMD_PCIE/ip/bmd_design/simulation/functional/wave.tcl
BMD_PCIE/ip/bmd_design/simulation/functional/wave.wcfg
BMD_PCIE/ip/bmd_design/simulation/tests/tests.v
BMD_PCIE/ip/bmd_design/source/bmd_design.v
BMD_PCIE/ip/bmd_design/source/gtpa1_dual_wrapper.v
BMD_PCIE/ip/bmd_design/source/gtpa1_dual_wrapper_tile.v
BMD_PCIE/ip/bmd_design/source/pcie_brams_s6.v
BMD_PCIE/ip/bmd_design/source/pcie_bram_s6.v
BMD_PCIE/ip/bmd_design/source/pcie_bram_top_s6.v
BMD_PCIE/ip/bmd_design.gise
BMD_PCIE/ip/bmd_design.ncf
BMD_PCIE/ip/bmd_design.veo
BMD_PCIE/ip/bmd_design.xco
BMD_PCIE/ip/bmd_design.xise
BMD_PCIE/ip/bmd_design_flist.txt
BMD_PCIE/ip/bmd_design_verilog_example_project.xise
BMD_PCIE/ip/bmd_design_xmdf.tcl
BMD_PCIE/ip/coregen.cgp
BMD_PCIE/ip/gen_bmd_design.tcl
BMD_PCIE/ip/tmp/_xmsgs/pn_parser.xmsgs
BMD_PCIE/ip/_xmsgs/cg.xmsgs
BMD_PCIE/ip/_xmsgs/pn_parser.xmsgs
BMD_PCIE/mcs/bmd_pcie.cfi
BMD_PCIE/mcs/bmd_pcie.mcs
BMD_PCIE/mcs/bmd_pcie.prm
BMD_PCIE/par/BMD_PCIE/BMD_PCIE.xise
BMD_PCIE/par/BMD_PCIE/iseconfig/BMD_TX_ENGINE.xreport
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/BMD_PCIE.gise
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/BMD_TX_ENGINE_summary.html
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/pcie_app_s6_summary.html
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/webtalk_pn.xml
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.cmd_log
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.lso
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.ngc
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.ngr
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.prj
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.stx
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.syr
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6.xst
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6_cs.blc
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6_cs.ngc
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6_envsettings.html
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilinx_pcie_1_1_ep_s6_summary.html
BMD_PCIE/par/BMD_PCIE/remote_sources/PRJ/xilin

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