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文件名称:2_MUX_4_1_vt

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    2015-11-08
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    168.88kb
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verilog HDL 编程 二选一多路选择器 带仿真文件-this is a verilog module.it have the fanction of selet the signal form two signals.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

2_MUX_4_1_vt/
2_MUX_4_1_vt/quartus/
2_MUX_4_1_vt/quartus/MUX_4_1.asm.rpt
2_MUX_4_1_vt/quartus/MUX_4_1.done
2_MUX_4_1_vt/quartus/MUX_4_1.eda.rpt
2_MUX_4_1_vt/quartus/MUX_4_1.fit.rpt
2_MUX_4_1_vt/quartus/MUX_4_1.fit.smsg
2_MUX_4_1_vt/quartus/MUX_4_1.fit.summary
2_MUX_4_1_vt/quartus/MUX_4_1.flow.rpt
2_MUX_4_1_vt/quartus/MUX_4_1.jdi
2_MUX_4_1_vt/quartus/MUX_4_1.map.rpt
2_MUX_4_1_vt/quartus/MUX_4_1.map.summary
2_MUX_4_1_vt/quartus/MUX_4_1.pin
2_MUX_4_1_vt/quartus/MUX_4_1.pof
2_MUX_4_1_vt/quartus/MUX_4_1.qpf
2_MUX_4_1_vt/quartus/MUX_4_1.qsf
2_MUX_4_1_vt/quartus/MUX_4_1.qws
2_MUX_4_1_vt/quartus/MUX_4_1.sta.rpt
2_MUX_4_1_vt/quartus/MUX_4_1.sta.summary
2_MUX_4_1_vt/quartus/MUX_4_1_nativelink_simulation.rpt
2_MUX_4_1_vt/quartus/db/
2_MUX_4_1_vt/quartus/db/MUX_4_1.(1).cnf.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.(1).cnf.hdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.amm.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.asm.qmsg
2_MUX_4_1_vt/quartus/db/MUX_4_1.asm.rdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.asm_labs.ddb
2_MUX_4_1_vt/quartus/db/MUX_4_1.cbx.xml
2_MUX_4_1_vt/quartus/db/MUX_4_1.cmp.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.cmp.hdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.cmp.kpt
2_MUX_4_1_vt/quartus/db/MUX_4_1.cmp.logdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.cmp.rdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.cmp0.ddb
2_MUX_4_1_vt/quartus/db/MUX_4_1.db_info
2_MUX_4_1_vt/quartus/db/MUX_4_1.eda.qmsg
2_MUX_4_1_vt/quartus/db/MUX_4_1.fit.qmsg
2_MUX_4_1_vt/quartus/db/MUX_4_1.hier_info
2_MUX_4_1_vt/quartus/db/MUX_4_1.hif
2_MUX_4_1_vt/quartus/db/MUX_4_1.idb.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.lpc.html
2_MUX_4_1_vt/quartus/db/MUX_4_1.lpc.rdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.lpc.txt
2_MUX_4_1_vt/quartus/db/MUX_4_1.map.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.map.hdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.map.logdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.map.qmsg
2_MUX_4_1_vt/quartus/db/MUX_4_1.map.rdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.pre_map.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.pre_map.hdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.root_partition.map.reg_db.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.routing.rdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.rpp.qmsg
2_MUX_4_1_vt/quartus/db/MUX_4_1.rtlv.hdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.rtlv_sg.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.rtlv_sg_swap.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.sgate.rvd
2_MUX_4_1_vt/quartus/db/MUX_4_1.sgate_sm.rvd
2_MUX_4_1_vt/quartus/db/MUX_4_1.sgdiff.cdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.sgdiff.hdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.sld_design_entry.sci
2_MUX_4_1_vt/quartus/db/MUX_4_1.sld_design_entry_dsc.sci
2_MUX_4_1_vt/quartus/db/MUX_4_1.smart_action.txt
2_MUX_4_1_vt/quartus/db/MUX_4_1.sta.qmsg
2_MUX_4_1_vt/quartus/db/MUX_4_1.sta.rdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.sta_cmp.5_slow.tdb
2_MUX_4_1_vt/quartus/db/MUX_4_1.syn_hier_info
2_MUX_4_1_vt/quartus/db/MUX_4_1.tis_db_list.ddb
2_MUX_4_1_vt/quartus/db/logic_util_heursitic.dat
2_MUX_4_1_vt/quartus/db/prev_cmp_MUX_4_1.qmsg
2_MUX_4_1_vt/quartus/incremental_db/
2_MUX_4_1_vt/quartus/incremental_db/README
2_MUX_4_1_vt/quartus/incremental_db/compiled_partitions/
2_MUX_4_1_vt/quartus/incremental_db/compiled_partitions/MUX_4_1.db_info
2_MUX_4_1_vt/quartus/incremental_db/compiled_partitions/MUX_4_1.root_partition.map.kpt
2_MUX_4_1_vt/quartus/simulation/
2_MUX_4_1_vt/quartus/simulation/modelsim/
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1.sft
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1.vo
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1.vt
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1.vt.bak
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1.vt~
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_modelsim.xrf
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_run_msim_rtl_verilog.do
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_run_msim_rtl_verilog.do.bak
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_run_msim_rtl_verilog.do.bak1
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_run_msim_rtl_verilog.do.bak2
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_run_msim_rtl_verilog.do.bak3
2_MUX_4_1_vt/quartus/simulation/modelsim/MUX_4_1_v.sdo
2_MUX_4_1_vt/quartus/simulation/modelsim/modelsim.ini
2_MUX_4_1_vt/quartus/simulation/modelsim/msim_transcript
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1/
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1/_primary.dat
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1/_primary.dbs
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1/_primary.vhd
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1/verilog.prw
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1/verilog.psm
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1_vlg_tst/
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1_vlg_tst/_primary.dat
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1_vlg_tst/_primary.dbs
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1_vlg_tst/_primary.vhd
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1_vlg_tst/verilog.prw
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/@m@u@x_4_1_vlg_tst/verilog.psm
2_MUX_4_1_vt/quartus/simulation/modelsim/rtl_work/_info
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