文件名称:fpga
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- 上传时间:2015-11-18
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文件大小:168kb
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介绍说明--下载内容来自于网络,使用问题请自行百度
FPGA代码,包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择
-FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection
-FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection
(系统自动生成,下载前可以参看下载内容)
下载文件列表
fpga/Slave_CPS_20151009/16BusTri.bdf
fpga/Slave_CPS_20151009/16BusTri.bsf
fpga/Slave_CPS_20151009/atom_netlists/Slave_all.qsf
fpga/Slave_CPS_20151009/CLK1ms.bdf
fpga/Slave_CPS_20151009/coder4_16.bdf
fpga/Slave_CPS_20151009/coder4_16.bsf
fpga/Slave_CPS_20151009/db/logic_util_heursitic.dat
fpga/Slave_CPS_20151009/db/MMC_Slave_all.map_bb.logdb
fpga/Slave_CPS_20151009/db/MMC_Slave_all.qns
fpga/Slave_CPS_20151009/db/prev_cmp_MMC_Slave_all.qmsg
fpga/Slave_CPS_20151009/db/Slave_all.db_info
fpga/Slave_CPS_20151009/db/Slave_all.sld_design_entry.sci
fpga/Slave_CPS_20151009/DSPread.bsf
fpga/Slave_CPS_20151009/DSPread.v
fpga/Slave_CPS_20151009/dzoneg.bsf
fpga/Slave_CPS_20151009/dzoneg.v
fpga/Slave_CPS_20151009/dzoneg.v.bak
fpga/Slave_CPS_20151009/fenpin.bsf
fpga/Slave_CPS_20151009/fenpin.v
fpga/Slave_CPS_20151009/FPGA变量说明.docx
fpga/Slave_CPS_20151009/greybox_tmp/cbx_args.txt
fpga/Slave_CPS_20151009/guoliubaohumod.bsf
fpga/Slave_CPS_20151009/guoliubaohumod.v
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.db_info
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.cmp.dfp
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.cmp.kpt
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.cmp.logdb
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.map.dpi
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.map.kpt
fpga/Slave_CPS_20151009/incremental_db/README
fpga/Slave_CPS_20151009/Link2_16.v
fpga/Slave_CPS_20151009/MMC_Slave_all.qpf
fpga/Slave_CPS_20151009/MMC_Slave_all.sdc
fpga/Slave_CPS_20151009/PLL_Ctrl.bsf
fpga/Slave_CPS_20151009/PLL_Ctrl.cnx
fpga/Slave_CPS_20151009/PLL_Ctrl.cnxerr
fpga/Slave_CPS_20151009/PLL_Ctrl.ppf
fpga/Slave_CPS_20151009/PLL_Ctrl.qip
fpga/Slave_CPS_20151009/PLL_Ctrl.v
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.cnx
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.cnxerr
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.qip
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.v
fpga/Slave_CPS_20151009/PLL_Ctrl_inst.v
fpga/Slave_CPS_20151009/PSControl.bsf
fpga/Slave_CPS_20151009/PSControl.v
fpga/Slave_CPS_20151009/PSControl.v.bak
fpga/Slave_CPS_20151009/PSCPWM.bsf
fpga/Slave_CPS_20151009/PSCPWM.v
fpga/Slave_CPS_20151009/PSCPWM.v.bak
fpga/Slave_CPS_20151009/qmegawiz_errors_log.txt
fpga/Slave_CPS_20151009/qsim/hierarchy.nfind
fpga/Slave_CPS_20151009/qsim/pos_fit.nfind
fpga/Slave_CPS_20151009/qsim/pos_syn.nfind
fpga/Slave_CPS_20151009/qsim/pre_syn.nfind
fpga/Slave_CPS_20151009/Slave_all.asm.rpt
fpga/Slave_CPS_20151009/Slave_all.bdf
fpga/Slave_CPS_20151009/Slave_all.cdf
fpga/Slave_CPS_20151009/Slave_all.done
fpga/Slave_CPS_20151009/Slave_all.fit.rpt
fpga/Slave_CPS_20151009/Slave_all.fit.smsg
fpga/Slave_CPS_20151009/Slave_all.fit.summary
fpga/Slave_CPS_20151009/Slave_all.flow.rpt
fpga/Slave_CPS_20151009/Slave_all.map.rpt
fpga/Slave_CPS_20151009/Slave_all.map.smsg
fpga/Slave_CPS_20151009/Slave_all.map.summary
fpga/Slave_CPS_20151009/Slave_all.pin
fpga/Slave_CPS_20151009/Slave_all.pof
fpga/Slave_CPS_20151009/Slave_all.qsf
fpga/Slave_CPS_20151009/Slave_all.qws
fpga/Slave_CPS_20151009/Slave_all.sof
fpga/Slave_CPS_20151009/Slave_all.sta.rpt
fpga/Slave_CPS_20151009/Slave_all.sta.summary
fpga/Slave_CPS_20151009/Slave_all.tcl
fpga/Slave_CPS_20151009/Slave_all_assignment_defaults.qdf
fpga/Slave_CPS_20151009/Triangle_PSC.v
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions
fpga/Slave_CPS_20151009/atom_netlists
fpga/Slave_CPS_20151009/db
fpga/Slave_CPS_20151009/greybox_tmp
fpga/Slave_CPS_20151009/incremental_db
fpga/Slave_CPS_20151009/qsim
fpga/Slave_CPS_20151009
fpga
fpga/Slave_CPS_20151009/16BusTri.bsf
fpga/Slave_CPS_20151009/atom_netlists/Slave_all.qsf
fpga/Slave_CPS_20151009/CLK1ms.bdf
fpga/Slave_CPS_20151009/coder4_16.bdf
fpga/Slave_CPS_20151009/coder4_16.bsf
fpga/Slave_CPS_20151009/db/logic_util_heursitic.dat
fpga/Slave_CPS_20151009/db/MMC_Slave_all.map_bb.logdb
fpga/Slave_CPS_20151009/db/MMC_Slave_all.qns
fpga/Slave_CPS_20151009/db/prev_cmp_MMC_Slave_all.qmsg
fpga/Slave_CPS_20151009/db/Slave_all.db_info
fpga/Slave_CPS_20151009/db/Slave_all.sld_design_entry.sci
fpga/Slave_CPS_20151009/DSPread.bsf
fpga/Slave_CPS_20151009/DSPread.v
fpga/Slave_CPS_20151009/dzoneg.bsf
fpga/Slave_CPS_20151009/dzoneg.v
fpga/Slave_CPS_20151009/dzoneg.v.bak
fpga/Slave_CPS_20151009/fenpin.bsf
fpga/Slave_CPS_20151009/fenpin.v
fpga/Slave_CPS_20151009/FPGA变量说明.docx
fpga/Slave_CPS_20151009/greybox_tmp/cbx_args.txt
fpga/Slave_CPS_20151009/guoliubaohumod.bsf
fpga/Slave_CPS_20151009/guoliubaohumod.v
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.db_info
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.cmp.dfp
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.cmp.kpt
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.cmp.logdb
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.map.dpi
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions/Slave_all.root_partition.map.kpt
fpga/Slave_CPS_20151009/incremental_db/README
fpga/Slave_CPS_20151009/Link2_16.v
fpga/Slave_CPS_20151009/MMC_Slave_all.qpf
fpga/Slave_CPS_20151009/MMC_Slave_all.sdc
fpga/Slave_CPS_20151009/PLL_Ctrl.bsf
fpga/Slave_CPS_20151009/PLL_Ctrl.cnx
fpga/Slave_CPS_20151009/PLL_Ctrl.cnxerr
fpga/Slave_CPS_20151009/PLL_Ctrl.ppf
fpga/Slave_CPS_20151009/PLL_Ctrl.qip
fpga/Slave_CPS_20151009/PLL_Ctrl.v
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.cnx
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.cnxerr
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.qip
fpga/Slave_CPS_20151009/PLL_Ctrl_bb.v
fpga/Slave_CPS_20151009/PLL_Ctrl_inst.v
fpga/Slave_CPS_20151009/PSControl.bsf
fpga/Slave_CPS_20151009/PSControl.v
fpga/Slave_CPS_20151009/PSControl.v.bak
fpga/Slave_CPS_20151009/PSCPWM.bsf
fpga/Slave_CPS_20151009/PSCPWM.v
fpga/Slave_CPS_20151009/PSCPWM.v.bak
fpga/Slave_CPS_20151009/qmegawiz_errors_log.txt
fpga/Slave_CPS_20151009/qsim/hierarchy.nfind
fpga/Slave_CPS_20151009/qsim/pos_fit.nfind
fpga/Slave_CPS_20151009/qsim/pos_syn.nfind
fpga/Slave_CPS_20151009/qsim/pre_syn.nfind
fpga/Slave_CPS_20151009/Slave_all.asm.rpt
fpga/Slave_CPS_20151009/Slave_all.bdf
fpga/Slave_CPS_20151009/Slave_all.cdf
fpga/Slave_CPS_20151009/Slave_all.done
fpga/Slave_CPS_20151009/Slave_all.fit.rpt
fpga/Slave_CPS_20151009/Slave_all.fit.smsg
fpga/Slave_CPS_20151009/Slave_all.fit.summary
fpga/Slave_CPS_20151009/Slave_all.flow.rpt
fpga/Slave_CPS_20151009/Slave_all.map.rpt
fpga/Slave_CPS_20151009/Slave_all.map.smsg
fpga/Slave_CPS_20151009/Slave_all.map.summary
fpga/Slave_CPS_20151009/Slave_all.pin
fpga/Slave_CPS_20151009/Slave_all.pof
fpga/Slave_CPS_20151009/Slave_all.qsf
fpga/Slave_CPS_20151009/Slave_all.qws
fpga/Slave_CPS_20151009/Slave_all.sof
fpga/Slave_CPS_20151009/Slave_all.sta.rpt
fpga/Slave_CPS_20151009/Slave_all.sta.summary
fpga/Slave_CPS_20151009/Slave_all.tcl
fpga/Slave_CPS_20151009/Slave_all_assignment_defaults.qdf
fpga/Slave_CPS_20151009/Triangle_PSC.v
fpga/Slave_CPS_20151009/incremental_db/compiled_partitions
fpga/Slave_CPS_20151009/atom_netlists
fpga/Slave_CPS_20151009/db
fpga/Slave_CPS_20151009/greybox_tmp
fpga/Slave_CPS_20151009/incremental_db
fpga/Slave_CPS_20151009/qsim
fpga/Slave_CPS_20151009
fpga
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