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文件名称:groundhog_v_0_2

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  • 上传时间:
    2015-11-27
  • 文件大小:
    4.4mb
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    0次
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介绍说明--下载内容来自于网络,使用问题请自行百度

Groundhog implements a SATA host bus adapter.-Groundhog implements a SATA host bus adapter. This Verilog-based project creates an easy-to-use interface between a user circuit on a Xilinx FPGA and a SATA hard drive or SSD.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

groundhog_v_0_2/
groundhog_v_0_2/BuildProcessTemplates/
groundhog_v_0_2/BuildProcessTemplates/DefaultTemplate.11.1.xaml
groundhog_v_0_2/BuildProcessTemplates/LabDefaultTemplate.11.xaml
groundhog_v_0_2/BuildProcessTemplates/UpgradeTemplate.xaml
groundhog_v_0_2/GroundhogHW_13_2/
groundhog_v_0_2/GroundhogHW_13_2/Groundhog.gise
groundhog_v_0_2/GroundhogHW_13_2/Groundhog.xise
groundhog_v_0_2/HWSrc/
groundhog_v_0_2/HWSrc/hba/
groundhog_v_0_2/HWSrc/hba/CRC_32.v
groundhog_v_0_2/HWSrc/hba/FIFO.v
groundhog_v_0_2/HWSrc/hba/HBA.ucf
groundhog_v_0_2/HWSrc/hba/HBA.v
groundhog_v_0_2/HWSrc/hba/Link.v
groundhog_v_0_2/HWSrc/hba/Scrambler.v
groundhog_v_0_2/HWSrc/hba/SpeedNegotiation.v
groundhog_v_0_2/HWSrc/hba/Transport.v
groundhog_v_0_2/HWSrc/hba/TransportInFIFO.v
groundhog_v_0_2/HWSrc/ipcores/
groundhog_v_0_2/HWSrc/sirc/
groundhog_v_0_2/HWSrc/sirc/ethernet2BlockMem.v
groundhog_v_0_2/HWSrc/sirc/ethernetController.v
groundhog_v_0_2/HWSrc/sirc/fifo36Wrapper.v
groundhog_v_0_2/HWSrc/sirc/iobuf.v
groundhog_v_0_2/HWSrc/sirc/system.v
groundhog_v_0_2/HWSrc/sirc/XUPV5system.ucf
groundhog_v_0_2/HWSrc/tm/
groundhog_v_0_2/HWSrc/tm/RNG.v
groundhog_v_0_2/HWSrc/tm/SinglePortBRAM_VHDL.vhd
groundhog_v_0_2/HWSrc/tm/TestSATA.v
groundhog_v_0_2/HWSrc/VC709-release/
groundhog_v_0_2/HWSrc/VC709-release/doc/
groundhog_v_0_2/HWSrc/VC709-release/doc/Create_Clk150_ipcore.pdf
groundhog_v_0_2/HWSrc/VC709-release/doc/FMC_SATA_connection.JPG
groundhog_v_0_2/HWSrc/VC709-release/doc/GTHSata2Instantiation.pdf
groundhog_v_0_2/HWSrc/VC709-release/hba/
groundhog_v_0_2/HWSrc/VC709-release/hba/CRC_32.v
groundhog_v_0_2/HWSrc/VC709-release/hba/FIFO.v
groundhog_v_0_2/HWSrc/VC709-release/hba/HBA.v
groundhog_v_0_2/HWSrc/VC709-release/hba/Link.v
groundhog_v_0_2/HWSrc/VC709-release/hba/Scrambler.v
groundhog_v_0_2/HWSrc/VC709-release/hba/SysClkRst.ucf
groundhog_v_0_2/HWSrc/VC709-release/hba/Transport.v
groundhog_v_0_2/HWSrc/VC709-release/hba/TransportInFIFO.v
groundhog_v_0_2/HWSrc/VC709-release/hba/XM104SATA.ucf
groundhog_v_0_2/HWSrc/VC709-release/ipcores/
groundhog_v_0_2/HWSrc/VC709-release/ipcores/example_design/
groundhog_v_0_2/HWSrc/VC709-release/ipcores/example_design/gth_sata_gtrxreset_seq.v
groundhog_v_0_2/HWSrc/VC709-release/ipcores/example_design/gth_sata_gt_usrclk_source.v
groundhog_v_0_2/HWSrc/VC709-release/ipcores/example_design/gth_sata_sync_block.v
groundhog_v_0_2/HWSrc/VC709-release/ipcores/gth_sata.v
groundhog_v_0_2/HWSrc/VC709-release/ipcores/gth_sata_gt.v
groundhog_v_0_2/precompiledBinaries/
groundhog_v_0_2/precompiledBinaries/SW_Example.exe
groundhog_v_0_2/precompiledBinaries/system.bit
groundhog_v_0_2/SWSrc/
groundhog_v_0_2/SWSrc/cputools.cpp
groundhog_v_0_2/SWSrc/cputools.h
groundhog_v_0_2/SWSrc/eth_SIRC.cpp
groundhog_v_0_2/SWSrc/eth_SIRC.h
groundhog_v_0_2/SWSrc/eth_SIRC.rc
groundhog_v_0_2/SWSrc/include.h
groundhog_v_0_2/SWSrc/main.cpp
groundhog_v_0_2/SWSrc/packet.cpp
groundhog_v_0_2/SWSrc/packet.h
groundhog_v_0_2/SWSrc/resource.h
groundhog_v_0_2/SWSrc/types.h
groundhog_v_0_2/SWSrc/util.cpp
groundhog_v_0_2/SWSrc/util.h
groundhog_v_0_2/SW_Example/
groundhog_v_0_2/SW_Example/SW_Example.sln
groundhog_v_0_2/SW_Example/SW_Example.vcxproj
groundhog_v_0_2/README_v0.1.pdf
groundhog_v_0_2/CHANGELOG_v0.2.pdf

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