文件名称:des_latest.tar
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利用verilog实现的DES和3DES两种加密算法,其中每个算法又利用了两种实现方式,分别是面积优先和性能优先-Both use DES and 3DES encryption algorithms verilog implementation, which took advantage of each algorithm implemented in two ways, which are the priority and performance priority area
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下载文件列表
des/
des/tags/
des/tags/initial/
des/tags/initial/README.txt
des/branches/
des/trunk/
des/trunk/doc/
des/trunk/doc/README.txt
des/trunk/sim/
des/trunk/sim/rtl_sim/
des/trunk/sim/rtl_sim/bin/
des/trunk/sim/rtl_sim/bin/Makefile
des/trunk/bench/
des/trunk/bench/verilog/
des/trunk/bench/verilog/des_test_ao.v
des/trunk/bench/verilog/des3_test_ao.v
des/trunk/bench/verilog/des3_test_po.v
des/trunk/bench/verilog/des_test_po.v
des/trunk/syn/
des/trunk/syn/bin/
des/trunk/syn/bin/design_spec_po.dc
des/trunk/syn/bin/comp_ao3.dc
des/trunk/syn/bin/read_po3.dc
des/trunk/syn/bin/comp_ao.dc
des/trunk/syn/bin/design_spec_po3.dc
des/trunk/syn/bin/read_ao.dc
des/trunk/syn/bin/comp_po.dc
des/trunk/syn/bin/lib_spec.dc
des/trunk/syn/bin/read_ao3.dc
des/trunk/syn/bin/comp_po3.dc
des/trunk/syn/bin/design_spec_ao.dc
des/trunk/syn/bin/read_po.dc
des/trunk/syn/bin/design_spec_ao3.dc
des/trunk/rtl/
des/trunk/rtl/verilog/
des/trunk/rtl/verilog/perf_opt/
des/trunk/rtl/verilog/perf_opt/des.v
des/trunk/rtl/verilog/perf_opt/des3.v
des/trunk/rtl/verilog/perf_opt/key_sel.v
des/trunk/rtl/verilog/area_opt/
des/trunk/rtl/verilog/area_opt/des.v
des/trunk/rtl/verilog/area_opt/key_sel3.v
des/trunk/rtl/verilog/area_opt/des3.v
des/trunk/rtl/verilog/area_opt/key_sel.v
des/trunk/rtl/verilog/common/
des/trunk/rtl/verilog/common/sbox6.v
des/trunk/rtl/verilog/common/crp.v
des/trunk/rtl/verilog/common/sbox1.v
des/trunk/rtl/verilog/common/sbox2.v
des/trunk/rtl/verilog/common/sbox5.v
des/trunk/rtl/verilog/common/sbox3.v
des/trunk/rtl/verilog/common/sbox7.v
des/trunk/rtl/verilog/common/sbox8.v
des/trunk/rtl/verilog/common/sbox4.v
des/web_uploads/
des/web_uploads/index.shtml
des/tags/
des/tags/initial/
des/tags/initial/README.txt
des/branches/
des/trunk/
des/trunk/doc/
des/trunk/doc/README.txt
des/trunk/sim/
des/trunk/sim/rtl_sim/
des/trunk/sim/rtl_sim/bin/
des/trunk/sim/rtl_sim/bin/Makefile
des/trunk/bench/
des/trunk/bench/verilog/
des/trunk/bench/verilog/des_test_ao.v
des/trunk/bench/verilog/des3_test_ao.v
des/trunk/bench/verilog/des3_test_po.v
des/trunk/bench/verilog/des_test_po.v
des/trunk/syn/
des/trunk/syn/bin/
des/trunk/syn/bin/design_spec_po.dc
des/trunk/syn/bin/comp_ao3.dc
des/trunk/syn/bin/read_po3.dc
des/trunk/syn/bin/comp_ao.dc
des/trunk/syn/bin/design_spec_po3.dc
des/trunk/syn/bin/read_ao.dc
des/trunk/syn/bin/comp_po.dc
des/trunk/syn/bin/lib_spec.dc
des/trunk/syn/bin/read_ao3.dc
des/trunk/syn/bin/comp_po3.dc
des/trunk/syn/bin/design_spec_ao.dc
des/trunk/syn/bin/read_po.dc
des/trunk/syn/bin/design_spec_ao3.dc
des/trunk/rtl/
des/trunk/rtl/verilog/
des/trunk/rtl/verilog/perf_opt/
des/trunk/rtl/verilog/perf_opt/des.v
des/trunk/rtl/verilog/perf_opt/des3.v
des/trunk/rtl/verilog/perf_opt/key_sel.v
des/trunk/rtl/verilog/area_opt/
des/trunk/rtl/verilog/area_opt/des.v
des/trunk/rtl/verilog/area_opt/key_sel3.v
des/trunk/rtl/verilog/area_opt/des3.v
des/trunk/rtl/verilog/area_opt/key_sel.v
des/trunk/rtl/verilog/common/
des/trunk/rtl/verilog/common/sbox6.v
des/trunk/rtl/verilog/common/crp.v
des/trunk/rtl/verilog/common/sbox1.v
des/trunk/rtl/verilog/common/sbox2.v
des/trunk/rtl/verilog/common/sbox5.v
des/trunk/rtl/verilog/common/sbox3.v
des/trunk/rtl/verilog/common/sbox7.v
des/trunk/rtl/verilog/common/sbox8.v
des/trunk/rtl/verilog/common/sbox4.v
des/web_uploads/
des/web_uploads/index.shtml
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