文件名称:vga_test
-
所属分类：
- 标签属性：
- 上传时间：2016-01-15
-
文件大小：6.79mb
-
已下载：0次
-
提 供 者：
-
相关连接：无下载说明：别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容来自于网络，使用问题请自行百度
基于nios的vga控制器,分辨率及显示区域,显示位数,显存深度可调整,已经在altera cyclone ii条件下测试通过 quartus13.0开发环境 主机端符合avalon标准-VGA controller based on NIOS, resolution and display area show the median, the memory depth can be adjusted, has been in Altera cyclone II under the condition of test through the end of the quartus13.0 development environment of the host with Avalon standard
(系统自动生成,下载前可以参看下载内容)
下载文件列表
vga_test/.qsys_edit/filters.xml
vga_test/.qsys_edit/preferences.xml
vga_test/db/add_sub_8ri.tdf
vga_test/db/altera_mult_add_mpt2.v
vga_test/db/altera_mult_add_opt2.v
vga_test/db/altsyncram_0bc1.tdf
vga_test/db/altsyncram_0ff1.tdf
vga_test/db/altsyncram_2q14.tdf
vga_test/db/altsyncram_3q14.tdf
vga_test/db/altsyncram_4bc1.tdf
vga_test/db/altsyncram_4q14.tdf
vga_test/db/altsyncram_5q14.tdf
vga_test/db/altsyncram_6ec1.tdf
vga_test/db/altsyncram_9tl1.tdf
vga_test/db/altsyncram_9vc1.tdf
vga_test/db/altsyncram_aeq1.tdf
vga_test/db/altsyncram_beq1.tdf
vga_test/db/altsyncram_ceq1.tdf
vga_test/db/altsyncram_deq1.tdf
vga_test/db/altsyncram_gef1.tdf
vga_test/db/altsyncram_gp14.tdf
vga_test/db/altsyncram_hk71.tdf
vga_test/db/altsyncram_idg1.tdf
vga_test/db/altsyncram_lmu.tdf
vga_test/db/altsyncram_m3g1.tdf
vga_test/db/altsyncram_mdg1.tdf
vga_test/db/altsyncram_mlg1.tdf
vga_test/db/altsyncram_mp14.tdf
vga_test/db/altsyncram_n3g1.tdf
vga_test/db/altsyncram_pmu.tdf
vga_test/db/altsyncram_qed1.tdf
vga_test/db/altsyncram_r1h1.tdf
vga_test/db/altsyncram_rpu.tdf
vga_test/db/altsyncram_udq1.tdf
vga_test/db/alt_synch_pipe_iv7.tdf
vga_test/db/alt_synch_pipe_jv7.tdf
vga_test/db/alt_synch_pipe_kv7.tdf
vga_test/db/alt_synch_pipe_lv7.tdf
vga_test/db/alt_synch_pipe_mv7.tdf
vga_test/db/alt_synch_pipe_nv7.tdf
vga_test/db/a_dpfifo_8t21.tdf
vga_test/db/a_fefifo_7cf.tdf
vga_test/db/a_gray2bin_mdb.tdf
vga_test/db/a_gray2bin_odb.tdf
vga_test/db/a_graycounter_e2c.tdf
vga_test/db/a_graycounter_f2c.tdf
vga_test/db/a_graycounter_g2c.tdf
vga_test/db/a_graycounter_h2c.tdf
vga_test/db/a_graycounter_q96.tdf
vga_test/db/a_graycounter_s96.tdf
vga_test/db/cmpr_5cc.tdf
vga_test/db/cmpr_736.tdf
vga_test/db/cmpr_8cc.tdf
vga_test/db/cmpr_936.tdf
vga_test/db/cmpr_9cc.tdf
vga_test/db/cmpr_acc.tdf
vga_test/db/cntr_02j.tdf
vga_test/db/cntr_0ci.tdf
vga_test/db/cntr_1ci.tdf
vga_test/db/cntr_2ci.tdf
vga_test/db/cntr_3ci.tdf
vga_test/db/cntr_4ci.tdf
vga_test/db/cntr_fjb.tdf
vga_test/db/cntr_gui.tdf
vga_test/db/cntr_nbi.tdf
vga_test/db/cntr_obi.tdf
vga_test/db/cntr_rj7.tdf
vga_test/db/cntr_sbi.tdf
vga_test/db/cntr_v1j.tdf
vga_test/db/dcfifo_1fi1.tdf
vga_test/db/dcfifo_3fi1.tdf
vga_test/db/dcfifo_4fi1.tdf
vga_test/db/dcfifo_pei1.tdf
vga_test/db/dcfifo_vhi1.tdf
vga_test/db/decode_o37.tdf
vga_test/db/decode_rqf.tdf
vga_test/db/dffpipe_b09.tdf
vga_test/db/dffpipe_c09.tdf
vga_test/db/dffpipe_c2e.tdf
vga_test/db/dffpipe_d09.tdf
vga_test/db/dffpipe_e09.tdf
vga_test/db/dffpipe_f09.tdf
vga_test/db/dffpipe_g09.tdf
vga_test/db/dffpipe_h09.tdf
vga_test/db/dffpipe_i09.tdf
vga_test/db/disp_fifo.vhd
vga_test/db/dpram_5h21.tdf
vga_test/db/ip/vga_test/submodules/altera_avalon_sc_fifo.v
vga_test/db/ip/vga_test/submodules/altera_avalon_st_pipeline_base.v
vga_test/db/ip/vga_test/submodules/altera_merlin_address_alignment.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_arbitrator.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_burst_adapter.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_burst_uncompressor.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_master_agent.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_master_translator.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_slave_agent.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_slave_translator.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_traffic_limiter.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_width_adapter.sv
vga_test/db/ip/vga_test/submodules/altera_reset_controller.sdc
vga_test/db/ip/vga_test/submodules/altera_reset_controller.v
vga_test/db/ip/vga_test/submodules/altera_reset_synchronizer.v
vga_test/db/ip/vga_test/submodules/disp_fifo.vhd
vga_test/db/ip/vga_test/submodules/disp_fifo.vhd.bak
vga_test/db/ip/vga_test/submodules/led.v
vga_test/db/ip/vga_test/submodules/vga_interface.vhd
vga_test/db/ip/vga_test/submodules/vga_interface.vhd.bak
vga_test/db/ip/vga_test/submodules/vga_test_addr_router.sv
vga_test/db/ip/vga_test/submodules/vga_test_cmd_xbar_demux.sv
vga_test/db/ip/vga_test/submodules/vga_test_cmd_xbar_demux_001.sv
vga_test/db/ip/vga_test/submodules/vga_test_cmd_xbar_mux.sv
vga_test/db/ip/vga_test/submodules/vga_test_core.ocp
vga_test/db/ip/vga_test/submodules/vga_test_core.sdc
vga_test/db/ip/vga_test/submodules/vga_test_core.v
vga_test/db/ip/vga_test/submodules/vga_test_core_bht_ram.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_dc_tag_ram.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_ic_tag_ram.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_jtag_debug_module_sysclk.v
vga_test/db/ip/vga_test/submodules/vga_test_core_jtag_debug_module_tck.v
vga_test/db/ip/vga_test/submodules/vga_test_core_jtag_debug_module_wrapper.v
vga_test/db/ip/vga_test/submodules/vga_test_core_mult_cell.v
vga_test/db/ip/vga_test/submodules/vga_test_core_ociram_default_contents.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_oci_test_bench.v
vga_test/db/ip/vga_test/submodules/vga_test_core_rf_ram_a.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_rf_ram_b.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_test_bench.v
vga_test/db/ip/vga_test/submodules/vga_test_debug_uart.v
vga_test/db/ip/
vga_test/.qsys_edit/preferences.xml
vga_test/db/add_sub_8ri.tdf
vga_test/db/altera_mult_add_mpt2.v
vga_test/db/altera_mult_add_opt2.v
vga_test/db/altsyncram_0bc1.tdf
vga_test/db/altsyncram_0ff1.tdf
vga_test/db/altsyncram_2q14.tdf
vga_test/db/altsyncram_3q14.tdf
vga_test/db/altsyncram_4bc1.tdf
vga_test/db/altsyncram_4q14.tdf
vga_test/db/altsyncram_5q14.tdf
vga_test/db/altsyncram_6ec1.tdf
vga_test/db/altsyncram_9tl1.tdf
vga_test/db/altsyncram_9vc1.tdf
vga_test/db/altsyncram_aeq1.tdf
vga_test/db/altsyncram_beq1.tdf
vga_test/db/altsyncram_ceq1.tdf
vga_test/db/altsyncram_deq1.tdf
vga_test/db/altsyncram_gef1.tdf
vga_test/db/altsyncram_gp14.tdf
vga_test/db/altsyncram_hk71.tdf
vga_test/db/altsyncram_idg1.tdf
vga_test/db/altsyncram_lmu.tdf
vga_test/db/altsyncram_m3g1.tdf
vga_test/db/altsyncram_mdg1.tdf
vga_test/db/altsyncram_mlg1.tdf
vga_test/db/altsyncram_mp14.tdf
vga_test/db/altsyncram_n3g1.tdf
vga_test/db/altsyncram_pmu.tdf
vga_test/db/altsyncram_qed1.tdf
vga_test/db/altsyncram_r1h1.tdf
vga_test/db/altsyncram_rpu.tdf
vga_test/db/altsyncram_udq1.tdf
vga_test/db/alt_synch_pipe_iv7.tdf
vga_test/db/alt_synch_pipe_jv7.tdf
vga_test/db/alt_synch_pipe_kv7.tdf
vga_test/db/alt_synch_pipe_lv7.tdf
vga_test/db/alt_synch_pipe_mv7.tdf
vga_test/db/alt_synch_pipe_nv7.tdf
vga_test/db/a_dpfifo_8t21.tdf
vga_test/db/a_fefifo_7cf.tdf
vga_test/db/a_gray2bin_mdb.tdf
vga_test/db/a_gray2bin_odb.tdf
vga_test/db/a_graycounter_e2c.tdf
vga_test/db/a_graycounter_f2c.tdf
vga_test/db/a_graycounter_g2c.tdf
vga_test/db/a_graycounter_h2c.tdf
vga_test/db/a_graycounter_q96.tdf
vga_test/db/a_graycounter_s96.tdf
vga_test/db/cmpr_5cc.tdf
vga_test/db/cmpr_736.tdf
vga_test/db/cmpr_8cc.tdf
vga_test/db/cmpr_936.tdf
vga_test/db/cmpr_9cc.tdf
vga_test/db/cmpr_acc.tdf
vga_test/db/cntr_02j.tdf
vga_test/db/cntr_0ci.tdf
vga_test/db/cntr_1ci.tdf
vga_test/db/cntr_2ci.tdf
vga_test/db/cntr_3ci.tdf
vga_test/db/cntr_4ci.tdf
vga_test/db/cntr_fjb.tdf
vga_test/db/cntr_gui.tdf
vga_test/db/cntr_nbi.tdf
vga_test/db/cntr_obi.tdf
vga_test/db/cntr_rj7.tdf
vga_test/db/cntr_sbi.tdf
vga_test/db/cntr_v1j.tdf
vga_test/db/dcfifo_1fi1.tdf
vga_test/db/dcfifo_3fi1.tdf
vga_test/db/dcfifo_4fi1.tdf
vga_test/db/dcfifo_pei1.tdf
vga_test/db/dcfifo_vhi1.tdf
vga_test/db/decode_o37.tdf
vga_test/db/decode_rqf.tdf
vga_test/db/dffpipe_b09.tdf
vga_test/db/dffpipe_c09.tdf
vga_test/db/dffpipe_c2e.tdf
vga_test/db/dffpipe_d09.tdf
vga_test/db/dffpipe_e09.tdf
vga_test/db/dffpipe_f09.tdf
vga_test/db/dffpipe_g09.tdf
vga_test/db/dffpipe_h09.tdf
vga_test/db/dffpipe_i09.tdf
vga_test/db/disp_fifo.vhd
vga_test/db/dpram_5h21.tdf
vga_test/db/ip/vga_test/submodules/altera_avalon_sc_fifo.v
vga_test/db/ip/vga_test/submodules/altera_avalon_st_pipeline_base.v
vga_test/db/ip/vga_test/submodules/altera_merlin_address_alignment.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_arbitrator.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_burst_adapter.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_burst_uncompressor.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_master_agent.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_master_translator.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_slave_agent.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_slave_translator.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_traffic_limiter.sv
vga_test/db/ip/vga_test/submodules/altera_merlin_width_adapter.sv
vga_test/db/ip/vga_test/submodules/altera_reset_controller.sdc
vga_test/db/ip/vga_test/submodules/altera_reset_controller.v
vga_test/db/ip/vga_test/submodules/altera_reset_synchronizer.v
vga_test/db/ip/vga_test/submodules/disp_fifo.vhd
vga_test/db/ip/vga_test/submodules/disp_fifo.vhd.bak
vga_test/db/ip/vga_test/submodules/led.v
vga_test/db/ip/vga_test/submodules/vga_interface.vhd
vga_test/db/ip/vga_test/submodules/vga_interface.vhd.bak
vga_test/db/ip/vga_test/submodules/vga_test_addr_router.sv
vga_test/db/ip/vga_test/submodules/vga_test_cmd_xbar_demux.sv
vga_test/db/ip/vga_test/submodules/vga_test_cmd_xbar_demux_001.sv
vga_test/db/ip/vga_test/submodules/vga_test_cmd_xbar_mux.sv
vga_test/db/ip/vga_test/submodules/vga_test_core.ocp
vga_test/db/ip/vga_test/submodules/vga_test_core.sdc
vga_test/db/ip/vga_test/submodules/vga_test_core.v
vga_test/db/ip/vga_test/submodules/vga_test_core_bht_ram.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_dc_tag_ram.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_ic_tag_ram.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_jtag_debug_module_sysclk.v
vga_test/db/ip/vga_test/submodules/vga_test_core_jtag_debug_module_tck.v
vga_test/db/ip/vga_test/submodules/vga_test_core_jtag_debug_module_wrapper.v
vga_test/db/ip/vga_test/submodules/vga_test_core_mult_cell.v
vga_test/db/ip/vga_test/submodules/vga_test_core_ociram_default_contents.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_oci_test_bench.v
vga_test/db/ip/vga_test/submodules/vga_test_core_rf_ram_a.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_rf_ram_b.mif
vga_test/db/ip/vga_test/submodules/vga_test_core_test_bench.v
vga_test/db/ip/vga_test/submodules/vga_test_debug_uart.v
vga_test/db/ip/
本网站为编程资源及源代码搜集、介绍的搜索网站，版权归原作者所有！ 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.