文件名称:fpga
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- 上传时间：2016-02-04
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文件大小：513.26kb
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本系统以STM32控制器为核心，配合FPGA，采用等精度测量法，通过程控放大器对不同输入电压信号进行分档，实现宽带小信号放大。分档放大后的信号经过整形电路，通过FPGA对其边沿进行检测计数能够实现对正弦波的测周与测频，方波时间间隔的测量，矩形波占空比的测量，并采用彩色TFT进行显示测量信息。对于输入的高频信号能够在低于10mv有效值准确完成电路的放大和测频。-The system with STM32 controller as the core, with FPGA, using equal precision measurement method, through the programmable amplifier for different input voltage signal to carry on the branch, realize the broadband small signal amplification. Amplifying the signal through the shaping circuit, through the FPGA on the edge of counting detection can achieve the sine wave test weeks and frequency measurement, square wave time interval measurement, rectangular wave duty ratio measurement, and the TFT color display measurement information. For the input of the high-frequency signal can be less than the effective value of the 10mV to complete the circuit amplification and frequency measurement.
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下载文件列表
fpga/01.jic
fpga/01.map
fpga/chang_w.bsf
fpga/chang_w.v
fpga/chang_w.v.bak
fpga/count.bsf
fpga/db/S.db_info
fpga/db/S.ipinfo
fpga/db/S.sld_design_entry.sci
fpga/do.bsf
fpga/do.v
fpga/do.v.bak
fpga/dq.bsf
fpga/dq.v
fpga/dq.v.bak
fpga/et.bsf
fpga/et.v
fpga/et.v.bak
fpga/greybox_tmp/cbx_args.txt
fpga/incremental_db/compiled_partitions/S.autoh_e40e1.map.dpi
fpga/incremental_db/compiled_partitions/S.autoh_e40e1.map.kpt
fpga/incremental_db/compiled_partitions/S.autoh_e40e1.map.logdb
fpga/incremental_db/compiled_partitions/S.autos_3e921.map.dpi
fpga/incremental_db/compiled_partitions/S.autos_3e921.map.kpt
fpga/incremental_db/compiled_partitions/S.autos_3e921.map.logdb
fpga/incremental_db/compiled_partitions/S.db_info
fpga/incremental_db/compiled_partitions/S.root_partition.cmp.dfp
fpga/incremental_db/compiled_partitions/S.root_partition.cmp.kpt
fpga/incremental_db/compiled_partitions/S.root_partition.cmp.logdb
fpga/incremental_db/compiled_partitions/S.root_partition.map.dpi
fpga/incremental_db/compiled_partitions/S.root_partition.map.kpt
fpga/incremental_db/README
fpga/output_file.jic
fpga/output_file.map
fpga/output_files/004.jic
fpga/output_files/004.map
fpga/output_files/02e.jic
fpga/output_files/02e.map
fpga/output_files/03.jic
fpga/output_files/03.map
fpga/output_files/Chain2.cdf
fpga/output_files/count.v
fpga/output_files/count.v.bak
fpga/output_files/greybox_tmp/cbx_args.txt
fpga/output_files/output_file.jic
fpga/output_files/output_file.map
fpga/output_files/output_file_D.jic
fpga/output_files/output_file_D.map
fpga/output_files/PLL1.qip
fpga/output_files/S.asm.rpt
fpga/output_files/S.cdf
fpga/output_files/S.done
fpga/output_files/S.eda.rpt
fpga/output_files/S.fit.rpt
fpga/output_files/S.fit.smsg
fpga/output_files/S.fit.summary
fpga/output_files/S.flow.rpt
fpga/output_files/S.jdi
fpga/output_files/S.map.rpt
fpga/output_files/S.map.smsg
fpga/output_files/S.map.summary
fpga/output_files/S.pin
fpga/output_files/S.sof
fpga/output_files/S.sta.rpt
fpga/output_files/S.sta.summary
fpga/output_files/stp1.stp
fpga/output_files/stp1_auto_stripped.stp
fpga/output_files/xx1.jic
fpga/output_files/xx1.map
fpga/pd.bsf
fpga/pd.v
fpga/PLL1.bsf
fpga/PLL1.ppf
fpga/PLL1.qip
fpga/PLL1.v
fpga/PLL1_bb.v
fpga/PLLJ_PLLSPE_INFO.txt
fpga/S.qpf
fpga/S.qsf
fpga/S.qws
fpga/simulation/modelsim/S.sft
fpga/simulation/modelsim/S.vo
fpga/simulation/modelsim/S_8_1200mv_0c_slow.vo
fpga/simulation/modelsim/S_8_1200mv_0c_v_slow.sdo
fpga/simulation/modelsim/S_8_1200mv_85c_slow.vo
fpga/simulation/modelsim/S_8_1200mv_85c_v_slow.sdo
fpga/simulation/modelsim/S_min_1200mv_0c_fast.vo
fpga/simulation/modelsim/S_min_1200mv_0c_v_fast.sdo
fpga/simulation/modelsim/S_modelsim.xrf
fpga/simulation/modelsim/S_v.sdo
fpga/S_assignment_defaults.qdf
fpga/TOP_T.bdf
fpga/TOP_T.v
fpga/incremental_db/compiled_partitions
fpga/output_files/greybox_tmp
fpga/output_files/output_files
fpga/simulation/modelsim
fpga/db
fpga/greybox_tmp
fpga/incremental_db
fpga/output_files
fpga/simulation
fpga
fpga/01.map
fpga/chang_w.bsf
fpga/chang_w.v
fpga/chang_w.v.bak
fpga/count.bsf
fpga/db/S.db_info
fpga/db/S.ipinfo
fpga/db/S.sld_design_entry.sci
fpga/do.bsf
fpga/do.v
fpga/do.v.bak
fpga/dq.bsf
fpga/dq.v
fpga/dq.v.bak
fpga/et.bsf
fpga/et.v
fpga/et.v.bak
fpga/greybox_tmp/cbx_args.txt
fpga/incremental_db/compiled_partitions/S.autoh_e40e1.map.dpi
fpga/incremental_db/compiled_partitions/S.autoh_e40e1.map.kpt
fpga/incremental_db/compiled_partitions/S.autoh_e40e1.map.logdb
fpga/incremental_db/compiled_partitions/S.autos_3e921.map.dpi
fpga/incremental_db/compiled_partitions/S.autos_3e921.map.kpt
fpga/incremental_db/compiled_partitions/S.autos_3e921.map.logdb
fpga/incremental_db/compiled_partitions/S.db_info
fpga/incremental_db/compiled_partitions/S.root_partition.cmp.dfp
fpga/incremental_db/compiled_partitions/S.root_partition.cmp.kpt
fpga/incremental_db/compiled_partitions/S.root_partition.cmp.logdb
fpga/incremental_db/compiled_partitions/S.root_partition.map.dpi
fpga/incremental_db/compiled_partitions/S.root_partition.map.kpt
fpga/incremental_db/README
fpga/output_file.jic
fpga/output_file.map
fpga/output_files/004.jic
fpga/output_files/004.map
fpga/output_files/02e.jic
fpga/output_files/02e.map
fpga/output_files/03.jic
fpga/output_files/03.map
fpga/output_files/Chain2.cdf
fpga/output_files/count.v
fpga/output_files/count.v.bak
fpga/output_files/greybox_tmp/cbx_args.txt
fpga/output_files/output_file.jic
fpga/output_files/output_file.map
fpga/output_files/output_file_D.jic
fpga/output_files/output_file_D.map
fpga/output_files/PLL1.qip
fpga/output_files/S.asm.rpt
fpga/output_files/S.cdf
fpga/output_files/S.done
fpga/output_files/S.eda.rpt
fpga/output_files/S.fit.rpt
fpga/output_files/S.fit.smsg
fpga/output_files/S.fit.summary
fpga/output_files/S.flow.rpt
fpga/output_files/S.jdi
fpga/output_files/S.map.rpt
fpga/output_files/S.map.smsg
fpga/output_files/S.map.summary
fpga/output_files/S.pin
fpga/output_files/S.sof
fpga/output_files/S.sta.rpt
fpga/output_files/S.sta.summary
fpga/output_files/stp1.stp
fpga/output_files/stp1_auto_stripped.stp
fpga/output_files/xx1.jic
fpga/output_files/xx1.map
fpga/pd.bsf
fpga/pd.v
fpga/PLL1.bsf
fpga/PLL1.ppf
fpga/PLL1.qip
fpga/PLL1.v
fpga/PLL1_bb.v
fpga/PLLJ_PLLSPE_INFO.txt
fpga/S.qpf
fpga/S.qsf
fpga/S.qws
fpga/simulation/modelsim/S.sft
fpga/simulation/modelsim/S.vo
fpga/simulation/modelsim/S_8_1200mv_0c_slow.vo
fpga/simulation/modelsim/S_8_1200mv_0c_v_slow.sdo
fpga/simulation/modelsim/S_8_1200mv_85c_slow.vo
fpga/simulation/modelsim/S_8_1200mv_85c_v_slow.sdo
fpga/simulation/modelsim/S_min_1200mv_0c_fast.vo
fpga/simulation/modelsim/S_min_1200mv_0c_v_fast.sdo
fpga/simulation/modelsim/S_modelsim.xrf
fpga/simulation/modelsim/S_v.sdo
fpga/S_assignment_defaults.qdf
fpga/TOP_T.bdf
fpga/TOP_T.v
fpga/incremental_db/compiled_partitions
fpga/output_files/greybox_tmp
fpga/output_files/output_files
fpga/simulation/modelsim
fpga/db
fpga/greybox_tmp
fpga/incremental_db
fpga/output_files
fpga/simulation
fpga
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