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文件名称:6_XADC

  • 所属分类：
    Other systems
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2016-02-28
  • 文件大小：
    1.45mb
  • 已下载：
    3次
  • 提 供 者：
    jing*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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基于FPGA，硬件平台：basys3，软件平台：vivado。描述语言：verilog。 实现XADC采集双路外部电压输入。-Based on the FPGA hardware platform, software platform: basys3, vivado. Descr iption: verilog. The implementation of XADC acquisition dual external voltage input.
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下载文件列表

6_XADC/file_xadc/smg_disp.vhd
6_XADC/file_xadc/ug480.v
6_XADC/file_xadc/ug480.xdc
6_XADC/file_xadc/xadc_top.v
6_XADC/lab_xadc/lab_xadc.cache/wt/synthesis.wdf
6_XADC/lab_xadc/lab_xadc.cache/wt/webtalk_pa.xml
6_XADC/lab_xadc/lab_xadc.runs/.jobs/vrs_config_1.xml
6_XADC/lab_xadc/lab_xadc.runs/.jobs/vrs_config_2.xml
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/.Vivado Synthesis.queue.rst
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/.vivado.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/.vivado.end.rst
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/.Xil/clk_wiz_0_propImpl.xdc
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/clk_wiz_0.dcp
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/clk_wiz_0.tcl
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/clk_wiz_0.vds
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/clk_wiz_0_utilization_synth.pb
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/clk_wiz_0_utilization_synth.rpt
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/dont_touch.xdc
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/gen_run.xml
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/htr.txt
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/ISEWrap.js
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/ISEWrap.sh
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/project.wdf
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/rundef.js
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/runme.bat
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/runme.log
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/runme.sh
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/vivado.jou
6_XADC/lab_xadc/lab_xadc.runs/clk_wiz_0_synth_1/vivado.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.init_design.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.init_design.end.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.opt_design.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.opt_design.end.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.place_design.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.place_design.end.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.route_design.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.route_design.end.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.Vivado Implementation.queue.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.vivado.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.vivado.end.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.write_bitstream.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/.write_bitstream.end.rst
6_XADC/lab_xadc/lab_xadc.runs/impl_1/gen_run.xml
6_XADC/lab_xadc/lab_xadc.runs/impl_1/htr.txt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/init_design.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/ISEWrap.js
6_XADC/lab_xadc/lab_xadc.runs/impl_1/ISEWrap.sh
6_XADC/lab_xadc/lab_xadc.runs/impl_1/opt_design.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/place_design.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/project.wdf
6_XADC/lab_xadc/lab_xadc.runs/impl_1/route_design.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/rundef.js
6_XADC/lab_xadc/lab_xadc.runs/impl_1/runme.bat
6_XADC/lab_xadc/lab_xadc.runs/impl_1/runme.log
6_XADC/lab_xadc/lab_xadc.runs/impl_1/runme.sh
6_XADC/lab_xadc/lab_xadc.runs/impl_1/usage_statistics_webtalk.html
6_XADC/lab_xadc/lab_xadc.runs/impl_1/usage_statistics_webtalk.xml
6_XADC/lab_xadc/lab_xadc.runs/impl_1/vivado.jou
6_XADC/lab_xadc/lab_xadc.runs/impl_1/vivado.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/write_bitstream.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top.bit
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top.tcl
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top.vdi
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_clock_utilization_placed.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_control_sets_placed.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_drc_routed.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_drc_routed.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_io_placed.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_opt.dcp
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_placed.dcp
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_power_routed.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_power_summary_routed.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_routed.dcp
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_route_status.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_route_status.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_timing_summary_routed.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_timing_summary_routed.rpt
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_utilization_placed.pb
6_XADC/lab_xadc/lab_xadc.runs/impl_1/xadc_top_utilization_placed.rpt
6_XADC/lab_xadc/lab_xadc.runs/synth_1/.Vivado Synthesis.queue.rst
6_XADC/lab_xadc/lab_xadc.runs/synth_1/.vivado.begin.rst
6_XADC/lab_xadc/lab_xadc.runs/synth_1/.vivado.end.rst
6_XADC/lab_xadc/lab_xadc.runs/synth_1/dont_buffer.xdc
6_XADC/lab_xadc/lab_xadc.runs/synth_1/fsm_encoding.os
6_XADC/lab_xadc/lab_xadc.runs/synth_1/gen_run.xml
6_XADC/lab_xadc/lab_xadc.runs/synth_1/htr.txt
6_XADC/lab_xadc/lab_xadc.runs/synth_1/ISEWrap.js
6_XADC/lab_xadc/lab_xadc.runs/synth_1/ISEWrap.sh
6_XADC/lab_xadc/lab_xadc.runs/synth_1/rundef.js
6_XADC/lab_xadc/lab_xadc.runs/synth_1/runme.bat
6_XADC/lab_xadc/lab_xa

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