Field-programmable gate arrays (FPGAs) are on the verge of revolutionizing

digital signal processing in the manner that programmable digital signal processors (PDSPs) did nearly two decades ago. Many front-end digital signal

processing (DSP) algorithms, such as FFTs, FIR or IIR filters, to name just

a few, previously built with ASICs or PDSPs, are now most often replaced

by FPGAs. Modern FPGA families provide DSP arithmetic support with

fast-carry chains (Xilinx Virtex, Altera FLEX) that are used to implement

multiply-accumulates (MACs) at high speed, with low overhead and low costs

[1]. Previous FPGA families have most often targeted TTL “glue logic” and

did not have the high gate count needed for DSP functions. The efficient

implementation of these front-end algorithms is the main goal of this book.