FPGA/
FPGA/exp2_1/
FPGA/exp2_1/cmp_state.ini
FPGA/exp2_1/db/
FPGA/exp2_1/db/mux_j8c.tdf
FPGA/exp2_1/db/prev_cmp_reexpei2.asm.qmsg
FPGA/exp2_1/db/prev_cmp_reexpei2.fit.qmsg
FPGA/exp2_1/db/prev_cmp_reexpei2.map.qmsg
FPGA/exp2_1/db/prev_cmp_reexpei2.tan.qmsg
FPGA/exp2_1/db/reexpei2.(0).cnf.cdb
FPGA/exp2_1/db/reexpei2.(0).cnf.hdb
FPGA/exp2_1/db/reexpei2.(1).cnf.cdb
FPGA/exp2_1/db/reexpei2.(1).cnf.hdb
FPGA/exp2_1/db/reexpei2.(2).cnf.cdb
FPGA/exp2_1/db/reexpei2.(2).cnf.hdb
FPGA/exp2_1/db/reexpei2.(3).cnf.cdb
FPGA/exp2_1/db/reexpei2.(3).cnf.hdb
FPGA/exp2_1/db/reexpei2.asm.qmsg
FPGA/exp2_1/db/reexpei2.asm_labs.ddb
FPGA/exp2_1/db/reexpei2.cbx.xml
FPGA/exp2_1/db/reexpei2.cmp.cdb
FPGA/exp2_1/db/reexpei2.cmp.hdb
FPGA/exp2_1/db/reexpei2.cmp.logdb
FPGA/exp2_1/db/reexpei2.cmp.rdb
FPGA/exp2_1/db/reexpei2.cmp.tdb
FPGA/exp2_1/db/reexpei2.cmp0.ddb
FPGA/exp2_1/db/reexpei2.db_info
FPGA/exp2_1/db/reexpei2.dbp
FPGA/exp2_1/db/reexpei2.eco.cdb
FPGA/exp2_1/db/reexpei2.fit.qmsg
FPGA/exp2_1/db/reexpei2.hier_info
FPGA/exp2_1/db/reexpei2.hif
FPGA/exp2_1/db/reexpei2.map.cdb
FPGA/exp2_1/db/reexpei2.map.hdb
FPGA/exp2_1/db/reexpei2.map.logdb
FPGA/exp2_1/db/reexpei2.map.qmsg
FPGA/exp2_1/db/reexpei2.pre_map.cdb
FPGA/exp2_1/db/reexpei2.pre_map.hdb
FPGA/exp2_1/db/reexpei2.psp
FPGA/exp2_1/db/reexpei2.pss
FPGA/exp2_1/db/reexpei2.rpp.qmsg
FPGA/exp2_1/db/reexpei2.rtlv.hdb
FPGA/exp2_1/db/reexpei2.rtlv_sg.cdb
FPGA/exp2_1/db/reexpei2.rtlv_sg_swap.cdb
FPGA/exp2_1/db/reexpei2.sgate.rvd
FPGA/exp2_1/db/reexpei2.sgate_sm.rvd
FPGA/exp2_1/db/reexpei2.sgdiff.cdb
FPGA/exp2_1/db/reexpei2.sgdiff.hdb
FPGA/exp2_1/db/reexpei2.signalprobe.cdb
FPGA/exp2_1/db/reexpei2.sim.vwf
FPGA/exp2_1/db/reexpei2.sld_design_entry.sci
FPGA/exp2_1/db/reexpei2.sld_design_entry_dsc.sci
FPGA/exp2_1/db/reexpei2.syn_hier_info
FPGA/exp2_1/db/reexpei2.tan.qmsg
FPGA/exp2_1/db/reexpei2.tis_db_list.ddb
FPGA/exp2_1/db/reexpei2_cmp.qrpt
FPGA/exp2_1/db/reexpei2_sim.qrpt
FPGA/exp2_1/demo2.bsf
FPGA/exp2_1/demo2.vhd
FPGA/exp2_1/reexpei2.asm.rpt
FPGA/exp2_1/reexpei2.bdf
FPGA/exp2_1/reexpei2.bsf
FPGA/exp2_1/reexpei2.cdf
FPGA/exp2_1/reexpei2.done
FPGA/exp2_1/reexpei2.fit.eqn
FPGA/exp2_1/reexpei2.fit.rpt
FPGA/exp2_1/reexpei2.fit.smsg
FPGA/exp2_1/reexpei2.fit.summary
FPGA/exp2_1/reexpei2.flow.rpt
FPGA/exp2_1/reexpei2.map.eqn
FPGA/exp2_1/reexpei2.map.rpt
FPGA/exp2_1/reexpei2.map.summary
FPGA/exp2_1/reexpei2.pin
FPGA/exp2_1/reexpei2.pof
FPGA/exp2_1/reexpei2.ppl
FPGA/exp2_1/reexpei2.qpf
FPGA/exp2_1/reexpei2.qsf
FPGA/exp2_1/reexpei2.qws
FPGA/exp2_1/reexpei2.sim.rpt
FPGA/exp2_1/reexpei2.sof
FPGA/exp2_1/reexpei2.tan.rpt
FPGA/exp2_1/reexpei2.tan.summary
FPGA/exp2_1/reexpei2.vwf
FPGA/exp2_1/reexpei2_assignment_defaults.qdf
FPGA/exp2_1/sopc_builder_debug_log.txt
FPGA/exp2_1/stp1.stp
FPGA/exp2_1/stp2.stp
FPGA/序列检测器.doc
FPGA/教师联系方式及课程概述.ppt
FPGA/本科大作业（2011-9-5).doc
FPGA/第1章 可编程逻辑器件概述.ppt
FPGA/第2章 可编程逻辑器件的硬件结构.ppt
FPGA/第3章 VHDL语言基础.ppt
FPGA/第4章 VHDL的顺序描述语句.ppt
FPGA/第5章 VHDL的并行语句.ppt
FPGA/第6章 状态机设计.ppt
FPGA/第7章 宏功能模块设计.ppt
FPGA/第8章 设计实例.ppt