文件名称:utosnet_latest.tar
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- 上传时间:2016-05-25
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The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC.
The framework is based on the Node-on-Chip architecture (link to paper coming).
It works by utilizing a dual-port BlockRam in the FPGA, with one port exposed to access the PC (through uTosNet) and the other port exposed to access user-defined modules. This allows easy and generic storage of process variables.
Currently two versions of uTosNet are supported:
PC side USB converter chip UART FPGA
PC side Ethernet Digi Connect ME 9210 microcontroller module SPI FPGA-The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC.
The framework is based on the Node-on-Chip architecture (link to paper coming).
It works by utilizing a dual-port BlockRam in the FPGA, with one port exposed to access the PC (through uTosNet) and the other port exposed to access user-defined modules. This allows easy and generic storage of process variables.
Currently two versions of uTosNet are supported:
PC side USB converter chip UART FPGA
PC side Ethernet Digi Connect ME 9210 microcontroller module SPI FPGA
The framework is based on the Node-on-Chip architecture (link to paper coming).
It works by utilizing a dual-port BlockRam in the FPGA, with one port exposed to access the PC (through uTosNet) and the other port exposed to access user-defined modules. This allows easy and generic storage of process variables.
Currently two versions of uTosNet are supported:
PC side USB converter chip UART FPGA
PC side Ethernet Digi Connect ME 9210 microcontroller module SPI FPGA-The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC.
The framework is based on the Node-on-Chip architecture (link to paper coming).
It works by utilizing a dual-port BlockRam in the FPGA, with one port exposed to access the PC (through uTosNet) and the other port exposed to access user-defined modules. This allows easy and generic storage of process variables.
Currently two versions of uTosNet are supported:
PC side USB converter chip UART FPGA
PC side Ethernet Digi Connect ME 9210 microcontroller module SPI FPGA
(系统自动生成,下载前可以参看下载内容)
下载文件列表
文件名 | 大小 | 更新时间 |
---|---|---|
utosnet/ | ||
utosnet/tags/ | ||
utosnet/branches/ | ||
utosnet/trunk/ | ||
utosnet/trunk/documentation/ | ||
utosnet/trunk/documentation/Userguide | Using uTosNet in a project.pdf | |
utosnet/trunk/documentation/Spartan3 Experimentation Board | Preliminary Users Guide.pdf | |
utosnet/trunk/gateware/ | ||
utosnet/trunk/gateware/uTosNet_spi/ | ||
utosnet/trunk/gateware/uTosNet_spi/dataRegister.xco | ||
utosnet/trunk/gateware/uTosNet_spi/readme_ip_xc3s50an_tqg144.txt | ||
utosnet/trunk/gateware/uTosNet_spi/uTosNet_spi.vhd | ||
utosnet/trunk/gateware/uTosNet_uart/ | ||
utosnet/trunk/gateware/uTosNet_uart/dataRegister.xco | ||
utosnet/trunk/gateware/uTosNet_uart/readme_ip_xc3s50an_tqg144.txt | ||
utosnet/trunk/gateware/uTosNet_uart/uTosNet_uart.vhd | ||
utosnet/trunk/gateware/uTosNet_example/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/uTosNet_spi.xise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/top.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/uTosNet_spi.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.xco | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.vho | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.v | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.asy | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.ngc | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.ise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.gise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.xise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.veo | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/ipcore_dir/dataRegister.sym | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_spi/uTosNet_spi_xc3s50an.ucf | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/uTosNet_uart.xise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/top.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/uTosNet_uart.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.xco | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.vho | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.v | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister_xmdf.tcl | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.asy | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.ncf | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.ngc | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister_flist.txt | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.ise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.gise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.xise | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.veo | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/ipcore_dir/dataRegister.sym | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_uart/uTosNet_uart_xc3s50an.ucf | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTN_CTRL/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTN_CTRL/uTosNet_ctrl.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTN_CTRL/uTosNet_uart.vhd | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTN_CTRL/ip_xc3s50an_tqg144/ | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTN_CTRL/ip_xc3s50an_tqg144/dataRegister.xco | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTN_CTRL/ip_xc3s50an_tqg144/readme_ip_xc3s50an_tqg144.txt | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTNX_top.ucf | ||
utosnet/trunk/gateware/uTosNet_example/uTosNet_controller/UTNX_top.vhd | ||
utosnet/trunk/software/ | ||
utosnet/trunk/software/uTosNet_cmd/ | ||
utosnet/trunk/software/uTosNet_cmd/uTosNet_cmd.cpp | ||
utosnet/trunk/software/uTosNet_cmd/uTosNet_cmd.pro | ||
utosnet/trunk/software/uTosNet_cmd/uTosNet_cmd.h | ||
utosnet/trunk/software/uTosNet_cmd/uTosNet_cmd.dev | ||
utosnet/trunk/software/uTosNet_cmd/readme.txt | ||
utosnet/trunk/software/Digi_app/ | ||
utosnet/trunk/software/Digi_app/root.cxx | ||
utosnet/trunk/software/Digi_app/readme.txt | ||
utosnet/trunk/hardware/ | ||
utosnet/trunk/hardware/Spartan3_50AN_main/ | ||
utosnet/trunk/hardware/Spartan3_50AN_main/IO connections.SchDoc | ||
utosnet/trunk/hardware/Spartan3_50AN_main/KISS_Spartan3.PrjPcb | ||
utosnet/trunk/hardware/Spartan3_50AN_main/KISS_Spartan3-2.pdf | ||
utosnet/trunk/hardware/Spartan3_50AN_main/PCB.PcbDoc | ||
utosnet/trunk/hardware/Spartan3_50AN_main/Power.SchDoc | ||
utosnet/trunk/hardware/Spartan3_50AN_addon/ | ||
utosnet/trunk/hardware/Spartan3_50AN_addon/50 |
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