文件名称:vga
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- 上传时间:2016-07-28
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文件大小:1.46kb
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This VHDL sample demonstrates how to generate a VGA signal to make it possible to connect an FPGA to a monitor. Written for Mimas v2, but probably easily adapted to any other board with a VGA connector on it (that can also be done by manually connecting a VGA port to a R-2R DAC and connecting that to GPIO: google for more information).
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