文件名称:UDP
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- 上传时间:2016-07-31
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文件大小:4.47mb
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利用verilog语言写的基于千兆网卡的UDP协议驱动-Use verilog language written based Gigabit Ethernet UDP protocol driver
(系统自动生成,下载前可以参看下载内容)
下载文件列表
UDP/
UDP/IP_CORE/
UDP/IP_CORE/_xmsgs/
UDP/IP_CORE/_xmsgs/cg.xmsgs
UDP/IP_CORE/_xmsgs/pn_parser.xmsgs
UDP/IP_CORE/coregen.cgp
UDP/IP_CORE/coregen.log
UDP/IP_CORE/create_ram.tcl
UDP/IP_CORE/ram/
UDP/IP_CORE/ram/blk_mem_gen_v7_3_readme.txt
UDP/IP_CORE/ram/doc/
UDP/IP_CORE/ram/doc/blk_mem_gen_v7_3_vinfo.html
UDP/IP_CORE/ram/doc/pg058-blk-mem-gen.pdf
UDP/IP_CORE/ram/example_design/
UDP/IP_CORE/ram/example_design/ram_exdes.ucf
UDP/IP_CORE/ram/example_design/ram_exdes.vhd
UDP/IP_CORE/ram/example_design/ram_exdes.xdc
UDP/IP_CORE/ram/example_design/ram_prod.vhd
UDP/IP_CORE/ram/implement/
UDP/IP_CORE/ram/implement/implement.bat
UDP/IP_CORE/ram/implement/implement.sh
UDP/IP_CORE/ram/implement/planAhead_ise.bat
UDP/IP_CORE/ram/implement/planAhead_ise.sh
UDP/IP_CORE/ram/implement/planAhead_ise.tcl
UDP/IP_CORE/ram/implement/xst.prj
UDP/IP_CORE/ram/implement/xst.scr
UDP/IP_CORE/ram/simulation/
UDP/IP_CORE/ram/simulation/addr_gen.vhd
UDP/IP_CORE/ram/simulation/bmg_stim_gen.vhd
UDP/IP_CORE/ram/simulation/bmg_tb_pkg.vhd
UDP/IP_CORE/ram/simulation/checker.vhd
UDP/IP_CORE/ram/simulation/data_gen.vhd
UDP/IP_CORE/ram/simulation/functional/
UDP/IP_CORE/ram/simulation/functional/simcmds.tcl
UDP/IP_CORE/ram/simulation/functional/simulate_isim.bat
UDP/IP_CORE/ram/simulation/functional/simulate_mti.bat
UDP/IP_CORE/ram/simulation/functional/simulate_mti.do
UDP/IP_CORE/ram/simulation/functional/simulate_mti.sh
UDP/IP_CORE/ram/simulation/functional/simulate_ncsim.sh
UDP/IP_CORE/ram/simulation/functional/simulate_vcs.sh
UDP/IP_CORE/ram/simulation/functional/ucli_commands.key
UDP/IP_CORE/ram/simulation/functional/vcs_session.tcl
UDP/IP_CORE/ram/simulation/functional/wave_mti.do
UDP/IP_CORE/ram/simulation/functional/wave_ncsim.sv
UDP/IP_CORE/ram/simulation/ram_synth.vhd
UDP/IP_CORE/ram/simulation/ram_tb.vhd
UDP/IP_CORE/ram/simulation/random.vhd
UDP/IP_CORE/ram/simulation/timing/
UDP/IP_CORE/ram/simulation/timing/simcmds.tcl
UDP/IP_CORE/ram/simulation/timing/simulate_isim.bat
UDP/IP_CORE/ram/simulation/timing/simulate_mti.bat
UDP/IP_CORE/ram/simulation/timing/simulate_mti.do
UDP/IP_CORE/ram/simulation/timing/simulate_mti.sh
UDP/IP_CORE/ram/simulation/timing/simulate_ncsim.sh
UDP/IP_CORE/ram/simulation/timing/simulate_vcs.sh
UDP/IP_CORE/ram/simulation/timing/ucli_commands.key
UDP/IP_CORE/ram/simulation/timing/vcs_session.tcl
UDP/IP_CORE/ram/simulation/timing/wave_mti.do
UDP/IP_CORE/ram/simulation/timing/wave_ncsim.sv
UDP/IP_CORE/ram.asy
UDP/IP_CORE/ram.gise
UDP/IP_CORE/ram.ncf
UDP/IP_CORE/ram.ngc
UDP/IP_CORE/ram.sym
UDP/IP_CORE/ram.v
UDP/IP_CORE/ram.veo
UDP/IP_CORE/ram.xco
UDP/IP_CORE/ram.xise
UDP/IP_CORE/ram_flist.txt
UDP/IP_CORE/ram_xmdf.tcl
UDP/IP_CORE/summary.log
UDP/IP_CORE/tmp/
UDP/IP_CORE/tmp/_cg/
UDP/IP_CORE/tmp/_xmsgs/
UDP/IP_CORE/tmp/_xmsgs/pn_parser.xmsgs
UDP/IP_CORE/tmp/_xmsgs/xst.xmsgs
UDP/IP_CORE/tmp/ram.lso
UDP/IP_CORE/xlnx_auto_0_xdb/
UDP/SRC/
UDP/SRC/crc.v
UDP/SRC/ethernet.bmm
UDP/SRC/ethernet.v
UDP/SRC/iprecieve.v
UDP/SRC/ipsend.v
UDP/SRC/udp.v
UDP/ethernet/
UDP/ethernet/_ngo/
UDP/ethernet/_ngo/netlist.lst
UDP/ethernet/_xmsgs/
UDP/ethernet/_xmsgs/bitgen.xmsgs
UDP/ethernet/_xmsgs/map.xmsgs
UDP/ethernet/_xmsgs/ngdbuild.xmsgs
UDP/ethernet/_xmsgs/par.xmsgs
UDP/ethernet/_xmsgs/pn_parser.xmsgs
UDP/ethernet/_xmsgs/trce.xmsgs
UDP/ethernet/_xmsgs/xst.xmsgs
UDP/ethernet/ethernet.bgn
UDP/ethernet/ethernet.bit
UDP/ethernet/ethernet.bld
UDP/ethernet/ethernet.cmd_log
UDP/ethernet/ethernet.drc
UDP/ethernet/ethernet.gise
UDP/ethernet/ethernet.lso
UDP/ethernet/ethernet.ncd
UDP/ethernet/ethernet.ngc
UDP/ethernet/ethernet.ngd
UDP/ethernet/ethernet.ngr
UDP/ethernet/ethernet.pad
UDP/ethernet/ethernet.par
UDP/ethernet/ethernet.pcf
UDP/ethernet/ethernet.prj
UDP/ethernet/ethernet.ptwx
UDP/ethernet/ethernet.stx
UDP/ethernet/ethernet.syr
UDP/ethernet/ethernet.twr
UDP/ethernet/ethernet.twx
UDP/ethernet/ethernet.ucf
UDP/ethernet/ethernet.unroutes
UDP/ethernet/ethernet.ut
UDP/ethernet/ethernet.xise
UDP/ethernet/ethernet.xpi
UDP/ethernet/ethernet.xst
UDP/ethernet/ethernet_bitgen.xwbt
UDP/ethernet/ethernet_envsettings.html
UDP/ethernet/ethernet_guide.ncd
UDP/ethernet/ethernet_map.map
UDP/ethernet/ethernet_map.mrp
UDP/ethernet/ethernet_map.ncd
UDP/ethernet/ethernet_map.ngm
UDP/ethernet/ethernet_map.xrpt
UDP/ethernet/ethernet_ngdbuild.xrpt
UDP/ethernet/ethernet_pad.csv
UDP/ethernet/ethernet_pad.txt
UDP/ethernet/ethernet_par.xrpt
UDP/ethernet/ethernet_summary.html
UDP/ethernet/ethernet_summary.xml
UDP/ethernet/ethernet_usage.xml
UDP/ethernet/ethernet_xst.xrpt
UDP/ethernet/ipcore_dir/
UDP/ethernet/ipsend_summary.html
UDP/ethernet/iseconfig/
UDP/ethernet/iseconfig/ethernet.projectmgr
UDP/ethernet/iseconfig/ethernet.xreport
UDP/ethernet/iseconfig/ipsend.xreport
UDP/ethernet/pa.fromHdl.tcl
UDP/ethernet/par_usage_statistics.html
UDP/ethernet/planAhead_pid30016.debug
UDP/ethernet/planAhead_run_1/
UDP/ethernet/planAhead_run_1/ethernet.data/
UDP/ethernet/planAhead_run_1/ethernet.data/constrs_1/
UDP/ethernet/planAhead_run_1/ethernet.data/constrs_1/fileset.xml
UDP/ethernet/planAhead_run_1/ethernet.data/sim_1/
UDP/ethernet/planAhead_run_1/ethernet.data/sim_1/fileset.xml
UDP/ethernet/pl
UDP/IP_CORE/
UDP/IP_CORE/_xmsgs/
UDP/IP_CORE/_xmsgs/cg.xmsgs
UDP/IP_CORE/_xmsgs/pn_parser.xmsgs
UDP/IP_CORE/coregen.cgp
UDP/IP_CORE/coregen.log
UDP/IP_CORE/create_ram.tcl
UDP/IP_CORE/ram/
UDP/IP_CORE/ram/blk_mem_gen_v7_3_readme.txt
UDP/IP_CORE/ram/doc/
UDP/IP_CORE/ram/doc/blk_mem_gen_v7_3_vinfo.html
UDP/IP_CORE/ram/doc/pg058-blk-mem-gen.pdf
UDP/IP_CORE/ram/example_design/
UDP/IP_CORE/ram/example_design/ram_exdes.ucf
UDP/IP_CORE/ram/example_design/ram_exdes.vhd
UDP/IP_CORE/ram/example_design/ram_exdes.xdc
UDP/IP_CORE/ram/example_design/ram_prod.vhd
UDP/IP_CORE/ram/implement/
UDP/IP_CORE/ram/implement/implement.bat
UDP/IP_CORE/ram/implement/implement.sh
UDP/IP_CORE/ram/implement/planAhead_ise.bat
UDP/IP_CORE/ram/implement/planAhead_ise.sh
UDP/IP_CORE/ram/implement/planAhead_ise.tcl
UDP/IP_CORE/ram/implement/xst.prj
UDP/IP_CORE/ram/implement/xst.scr
UDP/IP_CORE/ram/simulation/
UDP/IP_CORE/ram/simulation/addr_gen.vhd
UDP/IP_CORE/ram/simulation/bmg_stim_gen.vhd
UDP/IP_CORE/ram/simulation/bmg_tb_pkg.vhd
UDP/IP_CORE/ram/simulation/checker.vhd
UDP/IP_CORE/ram/simulation/data_gen.vhd
UDP/IP_CORE/ram/simulation/functional/
UDP/IP_CORE/ram/simulation/functional/simcmds.tcl
UDP/IP_CORE/ram/simulation/functional/simulate_isim.bat
UDP/IP_CORE/ram/simulation/functional/simulate_mti.bat
UDP/IP_CORE/ram/simulation/functional/simulate_mti.do
UDP/IP_CORE/ram/simulation/functional/simulate_mti.sh
UDP/IP_CORE/ram/simulation/functional/simulate_ncsim.sh
UDP/IP_CORE/ram/simulation/functional/simulate_vcs.sh
UDP/IP_CORE/ram/simulation/functional/ucli_commands.key
UDP/IP_CORE/ram/simulation/functional/vcs_session.tcl
UDP/IP_CORE/ram/simulation/functional/wave_mti.do
UDP/IP_CORE/ram/simulation/functional/wave_ncsim.sv
UDP/IP_CORE/ram/simulation/ram_synth.vhd
UDP/IP_CORE/ram/simulation/ram_tb.vhd
UDP/IP_CORE/ram/simulation/random.vhd
UDP/IP_CORE/ram/simulation/timing/
UDP/IP_CORE/ram/simulation/timing/simcmds.tcl
UDP/IP_CORE/ram/simulation/timing/simulate_isim.bat
UDP/IP_CORE/ram/simulation/timing/simulate_mti.bat
UDP/IP_CORE/ram/simulation/timing/simulate_mti.do
UDP/IP_CORE/ram/simulation/timing/simulate_mti.sh
UDP/IP_CORE/ram/simulation/timing/simulate_ncsim.sh
UDP/IP_CORE/ram/simulation/timing/simulate_vcs.sh
UDP/IP_CORE/ram/simulation/timing/ucli_commands.key
UDP/IP_CORE/ram/simulation/timing/vcs_session.tcl
UDP/IP_CORE/ram/simulation/timing/wave_mti.do
UDP/IP_CORE/ram/simulation/timing/wave_ncsim.sv
UDP/IP_CORE/ram.asy
UDP/IP_CORE/ram.gise
UDP/IP_CORE/ram.ncf
UDP/IP_CORE/ram.ngc
UDP/IP_CORE/ram.sym
UDP/IP_CORE/ram.v
UDP/IP_CORE/ram.veo
UDP/IP_CORE/ram.xco
UDP/IP_CORE/ram.xise
UDP/IP_CORE/ram_flist.txt
UDP/IP_CORE/ram_xmdf.tcl
UDP/IP_CORE/summary.log
UDP/IP_CORE/tmp/
UDP/IP_CORE/tmp/_cg/
UDP/IP_CORE/tmp/_xmsgs/
UDP/IP_CORE/tmp/_xmsgs/pn_parser.xmsgs
UDP/IP_CORE/tmp/_xmsgs/xst.xmsgs
UDP/IP_CORE/tmp/ram.lso
UDP/IP_CORE/xlnx_auto_0_xdb/
UDP/SRC/
UDP/SRC/crc.v
UDP/SRC/ethernet.bmm
UDP/SRC/ethernet.v
UDP/SRC/iprecieve.v
UDP/SRC/ipsend.v
UDP/SRC/udp.v
UDP/ethernet/
UDP/ethernet/_ngo/
UDP/ethernet/_ngo/netlist.lst
UDP/ethernet/_xmsgs/
UDP/ethernet/_xmsgs/bitgen.xmsgs
UDP/ethernet/_xmsgs/map.xmsgs
UDP/ethernet/_xmsgs/ngdbuild.xmsgs
UDP/ethernet/_xmsgs/par.xmsgs
UDP/ethernet/_xmsgs/pn_parser.xmsgs
UDP/ethernet/_xmsgs/trce.xmsgs
UDP/ethernet/_xmsgs/xst.xmsgs
UDP/ethernet/ethernet.bgn
UDP/ethernet/ethernet.bit
UDP/ethernet/ethernet.bld
UDP/ethernet/ethernet.cmd_log
UDP/ethernet/ethernet.drc
UDP/ethernet/ethernet.gise
UDP/ethernet/ethernet.lso
UDP/ethernet/ethernet.ncd
UDP/ethernet/ethernet.ngc
UDP/ethernet/ethernet.ngd
UDP/ethernet/ethernet.ngr
UDP/ethernet/ethernet.pad
UDP/ethernet/ethernet.par
UDP/ethernet/ethernet.pcf
UDP/ethernet/ethernet.prj
UDP/ethernet/ethernet.ptwx
UDP/ethernet/ethernet.stx
UDP/ethernet/ethernet.syr
UDP/ethernet/ethernet.twr
UDP/ethernet/ethernet.twx
UDP/ethernet/ethernet.ucf
UDP/ethernet/ethernet.unroutes
UDP/ethernet/ethernet.ut
UDP/ethernet/ethernet.xise
UDP/ethernet/ethernet.xpi
UDP/ethernet/ethernet.xst
UDP/ethernet/ethernet_bitgen.xwbt
UDP/ethernet/ethernet_envsettings.html
UDP/ethernet/ethernet_guide.ncd
UDP/ethernet/ethernet_map.map
UDP/ethernet/ethernet_map.mrp
UDP/ethernet/ethernet_map.ncd
UDP/ethernet/ethernet_map.ngm
UDP/ethernet/ethernet_map.xrpt
UDP/ethernet/ethernet_ngdbuild.xrpt
UDP/ethernet/ethernet_pad.csv
UDP/ethernet/ethernet_pad.txt
UDP/ethernet/ethernet_par.xrpt
UDP/ethernet/ethernet_summary.html
UDP/ethernet/ethernet_summary.xml
UDP/ethernet/ethernet_usage.xml
UDP/ethernet/ethernet_xst.xrpt
UDP/ethernet/ipcore_dir/
UDP/ethernet/ipsend_summary.html
UDP/ethernet/iseconfig/
UDP/ethernet/iseconfig/ethernet.projectmgr
UDP/ethernet/iseconfig/ethernet.xreport
UDP/ethernet/iseconfig/ipsend.xreport
UDP/ethernet/pa.fromHdl.tcl
UDP/ethernet/par_usage_statistics.html
UDP/ethernet/planAhead_pid30016.debug
UDP/ethernet/planAhead_run_1/
UDP/ethernet/planAhead_run_1/ethernet.data/
UDP/ethernet/planAhead_run_1/ethernet.data/constrs_1/
UDP/ethernet/planAhead_run_1/ethernet.data/constrs_1/fileset.xml
UDP/ethernet/planAhead_run_1/ethernet.data/sim_1/
UDP/ethernet/planAhead_run_1/ethernet.data/sim_1/fileset.xml
UDP/ethernet/pl
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