文件名称:HDMI_4AV
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- 上传时间:2016-11-26
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文件大小:1.94mb
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已下载:0次
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该源码为基于FPGA的HDMI显示的一拖四的AV视频采集。该模块可方便移植在需要使用HDMI高清显示的场合,并且可将VGA显示一分为四,方便各个窗口显示不同的图像信息-The source for the FPGA-based HDMI display of a four of the AV video capture. The module can be easily transplanted in the need to use the HDMI high-definition display occasions, and VGA display can be divided into four, to facilitate the display of different windows of different image information
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下载文件列表
vip_ex17/.qsys_edit/filters.xml
vip_ex17/.qsys_edit/layout.xml
vip_ex17/.qsys_edit/preferences.xml
vip_ex17/.qsys_edit/vip_qsys.xml
vip_ex17/altmemphy-library/auk_ddr_hp_controller.ocp
vip_ex17/alt_mem_ddrx_addr_cmd.v
vip_ex17/alt_mem_ddrx_addr_cmd_wrap.v
vip_ex17/alt_mem_ddrx_arbiter.v
vip_ex17/alt_mem_ddrx_buffer.v
vip_ex17/alt_mem_ddrx_buffer_manager.v
vip_ex17/alt_mem_ddrx_burst_gen.v
vip_ex17/alt_mem_ddrx_burst_tracking.v
vip_ex17/alt_mem_ddrx_cmd_gen.v
vip_ex17/alt_mem_ddrx_controller.v
vip_ex17/alt_mem_ddrx_controller_st_top.v
vip_ex17/alt_mem_ddrx_csr.v
vip_ex17/alt_mem_ddrx_dataid_manager.v
vip_ex17/alt_mem_ddrx_ddr2_odt_gen.v
vip_ex17/alt_mem_ddrx_ddr3_odt_gen.v
vip_ex17/alt_mem_ddrx_define.iv
vip_ex17/alt_mem_ddrx_ecc_decoder.v
vip_ex17/alt_mem_ddrx_ecc_decoder_32_syn.v
vip_ex17/alt_mem_ddrx_ecc_decoder_64_syn.v
vip_ex17/alt_mem_ddrx_ecc_encoder.v
vip_ex17/alt_mem_ddrx_ecc_encoder_32_syn.v
vip_ex17/alt_mem_ddrx_ecc_encoder_64_syn.v
vip_ex17/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v
vip_ex17/alt_mem_ddrx_fifo.v
vip_ex17/alt_mem_ddrx_input_if.v
vip_ex17/alt_mem_ddrx_list.v
vip_ex17/alt_mem_ddrx_lpddr2_addr_cmd.v
vip_ex17/alt_mem_ddrx_mm_st_converter.v
vip_ex17/alt_mem_ddrx_odt_gen.v
vip_ex17/alt_mem_ddrx_rank_timer.v
vip_ex17/alt_mem_ddrx_rdata_path.v
vip_ex17/alt_mem_ddrx_rdwr_data_tmg.v
vip_ex17/alt_mem_ddrx_sideband.v
vip_ex17/alt_mem_ddrx_tbp.v
vip_ex17/alt_mem_ddrx_timing_param.v
vip_ex17/alt_mem_ddrx_wdata_path.v
vip_ex17/alt_mem_phy_defines.v
vip_ex17/data_source.v
vip_ex17/db/vip.db_info
vip_ex17/db/vip.ipinfo
vip_ex17/db/vip.sld_design_entry.sci
vip_ex17/dbsr_ctrl.qip
vip_ex17/dbsr_ctrl.v
vip_ex17/dbsr_ctrl_bb.v
vip_ex17/dbsr_ctrl_inst.v
vip_ex17/ddr2_controller.bsf
vip_ex17/ddr2_controller.cmp
vip_ex17/ddr2_controller.html
vip_ex17/ddr2_controller.ppf
vip_ex17/ddr2_controller.qip
vip_ex17/ddr2_controller.v
vip_ex17/ddr2_controller_advisor.ipa
vip_ex17/ddr2_controller_alt_mem_ddrx_controller_top.v
vip_ex17/ddr2_controller_bb.v
vip_ex17/ddr2_controller_controller_phy.v
vip_ex17/ddr2_controller_example_driver.v
vip_ex17/ddr2_controller_example_top.sdc
vip_ex17/ddr2_controller_example_top.v
vip_ex17/ddr2_controller_example_top.v.tmp2
vip_ex17/ddr2_controller_example_top_1.v
vip_ex17/ddr2_controller_example_top_2.v
vip_ex17/ddr2_controller_ex_lfsr8.v
vip_ex17/ddr2_controller_phy.bsf
vip_ex17/ddr2_controller_phy.cmp
vip_ex17/ddr2_controller_phy.html
vip_ex17/ddr2_controller_phy.qip
vip_ex17/ddr2_controller_phy.v
vip_ex17/ddr2_controller_phy_alt_mem_phy.v
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll.qip
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll.v
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll.v_.bak
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll_bb.v
vip_ex17/ddr2_controller_phy_alt_mem_phy_seq.vhd
vip_ex17/ddr2_controller_phy_alt_mem_phy_seq_wrapper.v
vip_ex17/ddr2_controller_phy_autodetectedpins.tcl
vip_ex17/ddr2_controller_phy_bb.v
vip_ex17/ddr2_controller_phy_ddr_pins.tcl
vip_ex17/ddr2_controller_phy_ddr_timing.sdc
vip_ex17/ddr2_controller_phy_ddr_timing.tcl
vip_ex17/ddr2_controller_phy_report_timing.tcl
vip_ex17/ddr2_controller_phy_report_timing_core.tcl
vip_ex17/ddr2_controller_phy_summary.csv
vip_ex17/ddr2_controller_pin_assignments.tcl
vip_ex17/ddr2_high_performance_controller-library/auk_ddr_hp_controller.ocp
vip_ex17/greybox_tmp/cbx_args.txt
vip_ex17/IIC_CONTROLLER_hw.tcl
vip_ex17/IIC_CONTROLLER_hw.tcl~
vip_ex17/kfifo_ctrl.qip
vip_ex17/kfifo_ctrl.v
vip_ex17/kfifo_ctrl_bb.v
vip_ex17/kfifo_ctrl_inst.v
vip_ex17/led_controller.v
vip_ex17/muxadd.qip
vip_ex17/muxadd.v
vip_ex17/muxadd2.qip
vip_ex17/muxadd2.v
vip_ex17/muxadd2_bb.v
vip_ex17/muxadd_bb.v
vip_ex17/onchipram_for_ddr.qip
vip_ex17/onchipram_for_ddr.v
vip_ex17/onchipram_for_ddr_bb.v
vip_ex17/onchipram_for_ddr_inst.v
vip_ex17/onchipram_for_ddr_syn.v
vip_ex17/output_files/vip.cdf
vip_ex17/output_files/vip.done
vip_ex17/output_files/vip.fit.smsg
vip_ex17/output_files/vip.fit.summary
vip_ex17/output_files/vip.jdi
vip_ex17/output_files/vip.map.smsg
vip_ex17/output_files/vip.map.summary
vip_ex17/output_files/vip.pin
vip_ex17/output_files/vip.sof
vip_ex17/output_files/vip.sta.summary
vip_ex17/output_files/vipled.map
vip_ex17/pinassignment.docx
vip_ex17/PLLJ_PLLSPE_INFO.txt
vip_ex17/pll_controller.ppf
vip_ex17/pll_controller.qip
vip_ex17/pll_controller.v
vip_ex17/pll_controller_bb.v
vip_ex17/pll_controller_inst.v
vip_ex17/qmegawiz_errors_log.txt
vip_ex17/rdfifo_for_sdram.qip
vip_ex17/rdfifo_for_sdram.v
vip_ex17/rdfifo_for_sdram_bb.v
vip_ex17/software/vip_swprj/.cproject
vip_ex17/software/vip_swprj/.project
vip_ex17/software/vip_swprj/create-this-app
vip_ex17/software/vip_swprj/main.c
vip_ex17/software/vip_swprj/Makefile
vip_ex17/software/vip_swprj/obj/default/main.d
vip_ex17/software/vip_swprj/obj/default/main.o
vip_ex17/software/vip_swprj/readme.txt
vip_ex17/software/vip_swprj/vip_swprj.elf
vip_ex17/software/vip_swprj/vip_swprj.map
vip_ex17/software/vip_swprj/vip_swprj.objdump
vip_ex17/software/vip_swprj_bsp/.cproject
vip_ex17/software/vip_swprj_bsp/.force_rebuild_all
vip_ex17/software/vip_swprj_bsp/.force_relink
vip_ex17/software/vip_swprj_bsp/.project
vip_e
vip_ex17/.qsys_edit/layout.xml
vip_ex17/.qsys_edit/preferences.xml
vip_ex17/.qsys_edit/vip_qsys.xml
vip_ex17/altmemphy-library/auk_ddr_hp_controller.ocp
vip_ex17/alt_mem_ddrx_addr_cmd.v
vip_ex17/alt_mem_ddrx_addr_cmd_wrap.v
vip_ex17/alt_mem_ddrx_arbiter.v
vip_ex17/alt_mem_ddrx_buffer.v
vip_ex17/alt_mem_ddrx_buffer_manager.v
vip_ex17/alt_mem_ddrx_burst_gen.v
vip_ex17/alt_mem_ddrx_burst_tracking.v
vip_ex17/alt_mem_ddrx_cmd_gen.v
vip_ex17/alt_mem_ddrx_controller.v
vip_ex17/alt_mem_ddrx_controller_st_top.v
vip_ex17/alt_mem_ddrx_csr.v
vip_ex17/alt_mem_ddrx_dataid_manager.v
vip_ex17/alt_mem_ddrx_ddr2_odt_gen.v
vip_ex17/alt_mem_ddrx_ddr3_odt_gen.v
vip_ex17/alt_mem_ddrx_define.iv
vip_ex17/alt_mem_ddrx_ecc_decoder.v
vip_ex17/alt_mem_ddrx_ecc_decoder_32_syn.v
vip_ex17/alt_mem_ddrx_ecc_decoder_64_syn.v
vip_ex17/alt_mem_ddrx_ecc_encoder.v
vip_ex17/alt_mem_ddrx_ecc_encoder_32_syn.v
vip_ex17/alt_mem_ddrx_ecc_encoder_64_syn.v
vip_ex17/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v
vip_ex17/alt_mem_ddrx_fifo.v
vip_ex17/alt_mem_ddrx_input_if.v
vip_ex17/alt_mem_ddrx_list.v
vip_ex17/alt_mem_ddrx_lpddr2_addr_cmd.v
vip_ex17/alt_mem_ddrx_mm_st_converter.v
vip_ex17/alt_mem_ddrx_odt_gen.v
vip_ex17/alt_mem_ddrx_rank_timer.v
vip_ex17/alt_mem_ddrx_rdata_path.v
vip_ex17/alt_mem_ddrx_rdwr_data_tmg.v
vip_ex17/alt_mem_ddrx_sideband.v
vip_ex17/alt_mem_ddrx_tbp.v
vip_ex17/alt_mem_ddrx_timing_param.v
vip_ex17/alt_mem_ddrx_wdata_path.v
vip_ex17/alt_mem_phy_defines.v
vip_ex17/data_source.v
vip_ex17/db/vip.db_info
vip_ex17/db/vip.ipinfo
vip_ex17/db/vip.sld_design_entry.sci
vip_ex17/dbsr_ctrl.qip
vip_ex17/dbsr_ctrl.v
vip_ex17/dbsr_ctrl_bb.v
vip_ex17/dbsr_ctrl_inst.v
vip_ex17/ddr2_controller.bsf
vip_ex17/ddr2_controller.cmp
vip_ex17/ddr2_controller.html
vip_ex17/ddr2_controller.ppf
vip_ex17/ddr2_controller.qip
vip_ex17/ddr2_controller.v
vip_ex17/ddr2_controller_advisor.ipa
vip_ex17/ddr2_controller_alt_mem_ddrx_controller_top.v
vip_ex17/ddr2_controller_bb.v
vip_ex17/ddr2_controller_controller_phy.v
vip_ex17/ddr2_controller_example_driver.v
vip_ex17/ddr2_controller_example_top.sdc
vip_ex17/ddr2_controller_example_top.v
vip_ex17/ddr2_controller_example_top.v.tmp2
vip_ex17/ddr2_controller_example_top_1.v
vip_ex17/ddr2_controller_example_top_2.v
vip_ex17/ddr2_controller_ex_lfsr8.v
vip_ex17/ddr2_controller_phy.bsf
vip_ex17/ddr2_controller_phy.cmp
vip_ex17/ddr2_controller_phy.html
vip_ex17/ddr2_controller_phy.qip
vip_ex17/ddr2_controller_phy.v
vip_ex17/ddr2_controller_phy_alt_mem_phy.v
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll.qip
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll.v
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll.v_.bak
vip_ex17/ddr2_controller_phy_alt_mem_phy_pll_bb.v
vip_ex17/ddr2_controller_phy_alt_mem_phy_seq.vhd
vip_ex17/ddr2_controller_phy_alt_mem_phy_seq_wrapper.v
vip_ex17/ddr2_controller_phy_autodetectedpins.tcl
vip_ex17/ddr2_controller_phy_bb.v
vip_ex17/ddr2_controller_phy_ddr_pins.tcl
vip_ex17/ddr2_controller_phy_ddr_timing.sdc
vip_ex17/ddr2_controller_phy_ddr_timing.tcl
vip_ex17/ddr2_controller_phy_report_timing.tcl
vip_ex17/ddr2_controller_phy_report_timing_core.tcl
vip_ex17/ddr2_controller_phy_summary.csv
vip_ex17/ddr2_controller_pin_assignments.tcl
vip_ex17/ddr2_high_performance_controller-library/auk_ddr_hp_controller.ocp
vip_ex17/greybox_tmp/cbx_args.txt
vip_ex17/IIC_CONTROLLER_hw.tcl
vip_ex17/IIC_CONTROLLER_hw.tcl~
vip_ex17/kfifo_ctrl.qip
vip_ex17/kfifo_ctrl.v
vip_ex17/kfifo_ctrl_bb.v
vip_ex17/kfifo_ctrl_inst.v
vip_ex17/led_controller.v
vip_ex17/muxadd.qip
vip_ex17/muxadd.v
vip_ex17/muxadd2.qip
vip_ex17/muxadd2.v
vip_ex17/muxadd2_bb.v
vip_ex17/muxadd_bb.v
vip_ex17/onchipram_for_ddr.qip
vip_ex17/onchipram_for_ddr.v
vip_ex17/onchipram_for_ddr_bb.v
vip_ex17/onchipram_for_ddr_inst.v
vip_ex17/onchipram_for_ddr_syn.v
vip_ex17/output_files/vip.cdf
vip_ex17/output_files/vip.done
vip_ex17/output_files/vip.fit.smsg
vip_ex17/output_files/vip.fit.summary
vip_ex17/output_files/vip.jdi
vip_ex17/output_files/vip.map.smsg
vip_ex17/output_files/vip.map.summary
vip_ex17/output_files/vip.pin
vip_ex17/output_files/vip.sof
vip_ex17/output_files/vip.sta.summary
vip_ex17/output_files/vipled.map
vip_ex17/pinassignment.docx
vip_ex17/PLLJ_PLLSPE_INFO.txt
vip_ex17/pll_controller.ppf
vip_ex17/pll_controller.qip
vip_ex17/pll_controller.v
vip_ex17/pll_controller_bb.v
vip_ex17/pll_controller_inst.v
vip_ex17/qmegawiz_errors_log.txt
vip_ex17/rdfifo_for_sdram.qip
vip_ex17/rdfifo_for_sdram.v
vip_ex17/rdfifo_for_sdram_bb.v
vip_ex17/software/vip_swprj/.cproject
vip_ex17/software/vip_swprj/.project
vip_ex17/software/vip_swprj/create-this-app
vip_ex17/software/vip_swprj/main.c
vip_ex17/software/vip_swprj/Makefile
vip_ex17/software/vip_swprj/obj/default/main.d
vip_ex17/software/vip_swprj/obj/default/main.o
vip_ex17/software/vip_swprj/readme.txt
vip_ex17/software/vip_swprj/vip_swprj.elf
vip_ex17/software/vip_swprj/vip_swprj.map
vip_ex17/software/vip_swprj/vip_swprj.objdump
vip_ex17/software/vip_swprj_bsp/.cproject
vip_ex17/software/vip_swprj_bsp/.force_rebuild_all
vip_ex17/software/vip_swprj_bsp/.force_relink
vip_ex17/software/vip_swprj_bsp/.project
vip_e
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