文件名称:11_sdram_test
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module sdram_test(
input clk_50m,
input reset_n,
//sdram control
output S_CLK, //sdram clock
output S_CKE, //sdram clock enable
output S_NCS, //sdram chip select
output S_NWE, //sdram write enable
output S_NCAS, //sdram column address strobe
output S_NRAS, //sdram row address strobe
output [1:0] S_DQM, //sdram data enable
output [1:0] S_BA, //sdram bank address
output [12:0] S_A, //sdram address
inout [15:0] S_DB //sdram data
)
-module sdram_test(
input clk_50m,
input reset_n,
//sdram control
output S_CLK, //sdram clock
output S_CKE, //sdram clock enable
output S_NCS, //sdram chip select
output S_NWE, //sdram write enable
output S_NCAS, //sdram column address strobe
output S_NRAS, //sdram row address strobe
output [1:0] S_DQM, //sdram data enable
output [1:0] S_BA, //sdram bank address
output [12:0] S_A, //sdram address
inout [15:0] S_DB //sdram data
)
input clk_50m,
input reset_n,
//sdram control
output S_CLK, //sdram clock
output S_CKE, //sdram clock enable
output S_NCS, //sdram chip select
output S_NWE, //sdram write enable
output S_NCAS, //sdram column address strobe
output S_NRAS, //sdram row address strobe
output [1:0] S_DQM, //sdram data enable
output [1:0] S_BA, //sdram bank address
output [12:0] S_A, //sdram address
inout [15:0] S_DB //sdram data
)
-module sdram_test(
input clk_50m,
input reset_n,
//sdram control
output S_CLK, //sdram clock
output S_CKE, //sdram clock enable
output S_NCS, //sdram chip select
output S_NWE, //sdram write enable
output S_NCAS, //sdram column address strobe
output S_NRAS, //sdram row address strobe
output [1:0] S_DQM, //sdram data enable
output [1:0] S_BA, //sdram bank address
output [12:0] S_A, //sdram address
inout [15:0] S_DB //sdram data
)
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下载文件列表
11_sdram_test/sdram_test/audio_test_summary.html
11_sdram_test/sdram_test/chipscope_icon.ngc
11_sdram_test/sdram_test/chipscope_icon.v
11_sdram_test/sdram_test/chipscope_ila.ngc
11_sdram_test/sdram_test/chipscope_ila.v
11_sdram_test/sdram_test/ipcore_dir/coregen.cgp
11_sdram_test/sdram_test/ipcore_dir/coregen.log
11_sdram_test/sdram_test/ipcore_dir/create_rdfifo.tcl
11_sdram_test/sdram_test/ipcore_dir/create_rd_fif.tcl
11_sdram_test/sdram_test/ipcore_dir/create_sdram_pll.tcl
11_sdram_test/sdram_test/ipcore_dir/create_wrfifo.tcl
11_sdram_test/sdram_test/ipcore_dir/edit_rdfifo.tcl
11_sdram_test/sdram_test/ipcore_dir/edit_sdram_pll.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/doc/fifo_generator_v9_3_readme.txt
11_sdram_test/sdram_test/ipcore_dir/rdfifo/doc/fifo_generator_v9_3_vinfo.html
11_sdram_test/sdram_test/ipcore_dir/rdfifo/doc/pg057-fifo-generator.pdf
11_sdram_test/sdram_test/ipcore_dir/rdfifo/example_design/rdfifo_exdes.ucf
11_sdram_test/sdram_test/ipcore_dir/rdfifo/example_design/rdfifo_exdes.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/fifo_generator_v9_3_readme.txt
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement_synplify.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement_synplify.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/planAhead_ise.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/planAhead_ise.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/planAhead_ise.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/xst.prj
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/xst.scr
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_isim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_isim.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_mti.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_mti.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_ncsim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_vcs.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/ucli_commands.key
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/vcs_session.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/wave_isim.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/wave_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/wave_ncsim.sv
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_dgen.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_dverif.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_pctrl.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_pkg.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_rng.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_synth.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_tb.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_isim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_isim.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_mti.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_mti.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_ncsim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_vcs.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/ucli_commands.key
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/vcs_session.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/wave_isim.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/wave_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/wave_ncsim.sv
11_sdram_test/sdram_test/ipcore_dir/rdfifo.asy
11_sdram_test/sdram_test/ipcore_dir/rdfifo.gise
11_sdram_test/sdram_test/ipcore_dir/rdfifo.ncf
11_sdram_test/sdram_test/ipcore_dir/rdfifo.ngc
11_sdram_test/sdram_test/ipcore_dir/rdfifo.sym
11_sdram_test/sdram_test/ipcore_dir/rdfifo.v
11_sdram_test/sdram_test/ipcore_dir/rdfifo.veo
11_sdram_test/sdram_test/ipcore_dir/rdfifo.xco
11_sdram_test/sdram_test/ipcore_dir/rdfifo.xise
11_sdram_test/sdram_test/ipcore_dir/rdfifo_flist.txt
11_sdram_test/sdram_test/ipcore_dir/rdfifo_xmdf.tcl
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/clk_wiz_v3_6_readme.txt
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/doc/clk_wiz_v3_6_readme.txt
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/doc/clk_wiz_v3_6_vinfo.html
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/doc/pg065_clk_wiz.pdf
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/example_design/sdram_pll_exdes.ucf
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/example_design/sdram_pll_exdes.v
11_sdram_test/sdram_test/ipcore_dir/sdram_pll
11_sdram_test/sdram_test/chipscope_icon.ngc
11_sdram_test/sdram_test/chipscope_icon.v
11_sdram_test/sdram_test/chipscope_ila.ngc
11_sdram_test/sdram_test/chipscope_ila.v
11_sdram_test/sdram_test/ipcore_dir/coregen.cgp
11_sdram_test/sdram_test/ipcore_dir/coregen.log
11_sdram_test/sdram_test/ipcore_dir/create_rdfifo.tcl
11_sdram_test/sdram_test/ipcore_dir/create_rd_fif.tcl
11_sdram_test/sdram_test/ipcore_dir/create_sdram_pll.tcl
11_sdram_test/sdram_test/ipcore_dir/create_wrfifo.tcl
11_sdram_test/sdram_test/ipcore_dir/edit_rdfifo.tcl
11_sdram_test/sdram_test/ipcore_dir/edit_sdram_pll.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/doc/fifo_generator_v9_3_readme.txt
11_sdram_test/sdram_test/ipcore_dir/rdfifo/doc/fifo_generator_v9_3_vinfo.html
11_sdram_test/sdram_test/ipcore_dir/rdfifo/doc/pg057-fifo-generator.pdf
11_sdram_test/sdram_test/ipcore_dir/rdfifo/example_design/rdfifo_exdes.ucf
11_sdram_test/sdram_test/ipcore_dir/rdfifo/example_design/rdfifo_exdes.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/fifo_generator_v9_3_readme.txt
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement_synplify.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/implement_synplify.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/planAhead_ise.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/planAhead_ise.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/planAhead_ise.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/xst.prj
11_sdram_test/sdram_test/ipcore_dir/rdfifo/implement/xst.scr
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_isim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_isim.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_mti.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_mti.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_ncsim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/simulate_vcs.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/ucli_commands.key
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/vcs_session.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/wave_isim.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/wave_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/functional/wave_ncsim.sv
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_dgen.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_dverif.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_pctrl.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_pkg.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_rng.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_synth.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/rdfifo_tb.vhd
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_isim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_isim.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_mti.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_mti.sh
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_ncsim.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/simulate_vcs.bat
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/ucli_commands.key
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/vcs_session.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/wave_isim.tcl
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/wave_mti.do
11_sdram_test/sdram_test/ipcore_dir/rdfifo/simulation/timing/wave_ncsim.sv
11_sdram_test/sdram_test/ipcore_dir/rdfifo.asy
11_sdram_test/sdram_test/ipcore_dir/rdfifo.gise
11_sdram_test/sdram_test/ipcore_dir/rdfifo.ncf
11_sdram_test/sdram_test/ipcore_dir/rdfifo.ngc
11_sdram_test/sdram_test/ipcore_dir/rdfifo.sym
11_sdram_test/sdram_test/ipcore_dir/rdfifo.v
11_sdram_test/sdram_test/ipcore_dir/rdfifo.veo
11_sdram_test/sdram_test/ipcore_dir/rdfifo.xco
11_sdram_test/sdram_test/ipcore_dir/rdfifo.xise
11_sdram_test/sdram_test/ipcore_dir/rdfifo_flist.txt
11_sdram_test/sdram_test/ipcore_dir/rdfifo_xmdf.tcl
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/clk_wiz_v3_6_readme.txt
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/doc/clk_wiz_v3_6_readme.txt
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/doc/clk_wiz_v3_6_vinfo.html
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/doc/pg065_clk_wiz.pdf
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/example_design/sdram_pll_exdes.ucf
11_sdram_test/sdram_test/ipcore_dir/sdram_pll/example_design/sdram_pll_exdes.v
11_sdram_test/sdram_test/ipcore_dir/sdram_pll
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