fpga_ladybug_2.1/fpga_ladybug-2.1/doc/COMPILE_LIST
fpga_ladybug_2.1/fpga_ladybug-2.1/doc/README.html
fpga_ladybug_2.1/fpga_ladybug-2.1/doc/audio_dac.png
fpga_ladybug_2.1/fpga_ladybug-2.1/doc/audio_sigma_delta_dac.png
fpga_ladybug_2.1/fpga_ladybug-2.1/doc/lb-left.gif
fpga_ladybug_2.1/fpga_ladybug-2.1/doc/lb-right.gif
fpga_ladybug_2.1/fpga_ladybug-2.1/doc/rgb_dac.png
fpga_ladybug_2.1/fpga_ladybug-2.1/COPYING
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/hex/Makefile
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/Makefile
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/make_dummy_rom.pl
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/cosmic_avenger/decrypt_l.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/cosmic_avenger/decrypt_u.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/cosmic_avenger/copy_roms.sh
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/cosmic_avenger/ram_init.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/dorodon/copy_roms.sh
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/dorodon/ram_init.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/ladybug/decrypt_l.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/ladybug/decrypt_u.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/ladybug/copy_roms.sh
fpga_ladybug_2.1/fpga_ladybug-2.1/roms/ladybug/ram_init.bin
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_addr_dec.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_chute.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_chutes.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_cpu_comp_pack-p.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_cpu_ram.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_cpu_unit.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/cpu/ladybug_gpio.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/ladybug_clk.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/ladybug_comp_pack-p.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/ladybug_dip_pack-p.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/ladybug_machine.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/ladybug_res.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/b5-x300/b5_x300_ladybug.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/b5-x300/files.txt
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/b5-x300/pullup.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/jop/jop_ladybug.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/board_misc_comp_pack-p.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/dac.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/rom_dispatcher_16.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/rom_dispatcher_8.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/rom_ram_dispatcher_16.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/pcm_sound/pcm_sound.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/doc/README.txt
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/doc/STATUS.txt
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/doc/ac97_doc.pdf
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_cra.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_defines.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_dma_if.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_dma_req.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_fifo_ctrl.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_in_fifo.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_int.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_out_fifo.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_prc.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_rf.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_rst.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_sin.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_soc.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_sout.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_top.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/misc/ac97_ctrl/rtl/verilog/ac97_wb_if.v
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/README
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad-c.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad_comp-pack.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad_ctrl-c.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad_ctrl.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad_pack-p.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad_pad-c.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/snespad/snespad_pad.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/zefant-xs3/dblscan.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/zefant-xs3/files.txt
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/zefant-xs3/zefant-xs3_clk.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/board/zefant-xs3/zefant_xs3_ladybug.vhd
fpga_ladybug_2.1/fpga_ladybug-2.1/src/configuration