文件名称:VGA
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所属分类:
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- 上传时间:2017-04-17
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文件大小:2.03mb
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已下载:0次
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FPGA verilog写的关于vGA的显示程序,使用vivado编程环境-FPGA verilog written on the vGA display program, the use of vivado programming environment
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VGA/file_vga/vga.v
VGA/file_vga/vga.xdc
VGA/lab_vga/hs_err_pid4488.log
VGA/lab_vga/lab_vga.cache/wt/java_command_handlers.wdf
VGA/lab_vga/lab_vga.cache/wt/synthesis.wdf
VGA/lab_vga/lab_vga.cache/wt/webtalk_pa.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_1.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_10.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_11.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_12.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_13.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_14.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_15.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_2.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_3.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_4.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_5.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_6.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_7.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_8.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_9.xml
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.Vivado Synthesis.queue.rst
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.vivado.begin.rst
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.vivado.end.rst
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.Xil/clk_wiz_0_propImpl.xdc
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0.dcp
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0.tcl
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0.vds
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0_utilization_synth.pb
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0_utilization_synth.rpt
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/dont_touch.xdc
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/gen_run.xml
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/htr.txt
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/ISEWrap.js
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/ISEWrap.sh
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/project.wdf
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/rundef.js
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/runme.bat
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/runme.log
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/runme.sh
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/vivado.jou
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/vivado.pb
VGA/lab_vga/lab_vga.runs/impl_1/.init_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.init_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.opt_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.opt_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.place_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.place_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.route_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.route_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.Vivado Implementation.queue.rst
VGA/lab_vga/lab_vga.runs/impl_1/.vivado.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.vivado.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.write_bitstream.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.write_bitstream.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/gen_run.xml
VGA/lab_vga/lab_vga.runs/impl_1/htr.txt
VGA/lab_vga/lab_vga.runs/impl_1/init_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/ISEWrap.js
VGA/lab_vga/lab_vga.runs/impl_1/ISEWrap.sh
VGA/lab_vga/lab_vga.runs/impl_1/opt_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/place_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/project.wdf
VGA/lab_vga/lab_vga.runs/impl_1/route_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/rundef.js
VGA/lab_vga/lab_vga.runs/impl_1/runme.bat
VGA/lab_vga/lab_vga.runs/impl_1/runme.log
VGA/lab_vga/lab_vga.runs/impl_1/runme.sh
VGA/lab_vga/lab_vga.runs/impl_1/usage_statistics_webtalk.html
VGA/lab_vga/lab_vga.runs/impl_1/usage_statistics_webtalk.xml
VGA/lab_vga/lab_vga.runs/impl_1/vga.bit
VGA/lab_vga/lab_vga.runs/impl_1/vga.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga.tcl
VGA/lab_vga/lab_vga.runs/impl_1/vga.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_1872.backup.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_2672.backup.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_3956.backup.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_clock_utilization_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_control_sets_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_drc_routed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_drc_routed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_io_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_opt.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga_placed.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga_power_routed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_power_summary_routed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_routed.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga_route_status.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_route_status.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_timing_summary_routed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_timing_summary_routed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_utilization_placed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_utilization_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vivado.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado.pb
VGA/lab_vga/lab_vga.runs/impl_1/vivado_1872.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado_2672.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado_3956.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado_5340.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/write_bitstream.pb
VGA/
VGA/file_vga/vga.xdc
VGA/lab_vga/hs_err_pid4488.log
VGA/lab_vga/lab_vga.cache/wt/java_command_handlers.wdf
VGA/lab_vga/lab_vga.cache/wt/synthesis.wdf
VGA/lab_vga/lab_vga.cache/wt/webtalk_pa.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_1.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_10.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_11.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_12.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_13.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_14.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_15.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_2.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_3.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_4.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_5.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_6.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_7.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_8.xml
VGA/lab_vga/lab_vga.runs/.jobs/vrs_config_9.xml
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.Vivado Synthesis.queue.rst
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.vivado.begin.rst
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.vivado.end.rst
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/.Xil/clk_wiz_0_propImpl.xdc
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0.dcp
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0.tcl
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0.vds
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0_utilization_synth.pb
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/clk_wiz_0_utilization_synth.rpt
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/dont_touch.xdc
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/gen_run.xml
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/htr.txt
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/ISEWrap.js
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/ISEWrap.sh
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/project.wdf
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/rundef.js
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/runme.bat
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/runme.log
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/runme.sh
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/vivado.jou
VGA/lab_vga/lab_vga.runs/clk_wiz_0_synth_1/vivado.pb
VGA/lab_vga/lab_vga.runs/impl_1/.init_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.init_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.opt_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.opt_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.place_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.place_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.route_design.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.route_design.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.Vivado Implementation.queue.rst
VGA/lab_vga/lab_vga.runs/impl_1/.vivado.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.vivado.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/.write_bitstream.begin.rst
VGA/lab_vga/lab_vga.runs/impl_1/.write_bitstream.end.rst
VGA/lab_vga/lab_vga.runs/impl_1/gen_run.xml
VGA/lab_vga/lab_vga.runs/impl_1/htr.txt
VGA/lab_vga/lab_vga.runs/impl_1/init_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/ISEWrap.js
VGA/lab_vga/lab_vga.runs/impl_1/ISEWrap.sh
VGA/lab_vga/lab_vga.runs/impl_1/opt_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/place_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/project.wdf
VGA/lab_vga/lab_vga.runs/impl_1/route_design.pb
VGA/lab_vga/lab_vga.runs/impl_1/rundef.js
VGA/lab_vga/lab_vga.runs/impl_1/runme.bat
VGA/lab_vga/lab_vga.runs/impl_1/runme.log
VGA/lab_vga/lab_vga.runs/impl_1/runme.sh
VGA/lab_vga/lab_vga.runs/impl_1/usage_statistics_webtalk.html
VGA/lab_vga/lab_vga.runs/impl_1/usage_statistics_webtalk.xml
VGA/lab_vga/lab_vga.runs/impl_1/vga.bit
VGA/lab_vga/lab_vga.runs/impl_1/vga.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga.tcl
VGA/lab_vga/lab_vga.runs/impl_1/vga.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_1872.backup.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_2672.backup.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_3956.backup.vdi
VGA/lab_vga/lab_vga.runs/impl_1/vga_clock_utilization_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_control_sets_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_drc_routed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_drc_routed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_io_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_opt.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga_placed.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga_power_routed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_power_summary_routed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_routed.dcp
VGA/lab_vga/lab_vga.runs/impl_1/vga_route_status.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_route_status.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_timing_summary_routed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_timing_summary_routed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vga_utilization_placed.pb
VGA/lab_vga/lab_vga.runs/impl_1/vga_utilization_placed.rpt
VGA/lab_vga/lab_vga.runs/impl_1/vivado.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado.pb
VGA/lab_vga/lab_vga.runs/impl_1/vivado_1872.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado_2672.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado_3956.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/vivado_5340.backup.jou
VGA/lab_vga/lab_vga.runs/impl_1/write_bitstream.pb
VGA/
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