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文件名称:PROJECT_renlian4.0

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  • 上传时间:
    2017-05-23
  • 文件大小:
    33.24mb
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    1次
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基于STM32F407实现人脸识别和指纹识别的考勤系统硬件设计。-Hardware Design of Time and Attendance System Based on STM32F407 for Face Recognition and Fingerprint Identification.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

PROJECT_renlian4.0/ATK-OV2640摄像头模块_PCB.lib
PROJECT_renlian4.0/ATK-OV2640摄像头模块_SCH.lib
PROJECT_renlian4.0/CPU SCH ECO 2016-7-6 20-03-27.LOG
PROJECT_renlian4.0/CPU.SchDoc
PROJECT_renlian4.0/CPU.SchDocPreview
PROJECT_renlian4.0/Explorer STM32F407封装库_PCB.lib
PROJECT_renlian4.0/Explorer STM32F407封装库_SCH.lib
PROJECT_renlian4.0/History/
PROJECT_renlian4.0/History/CPU.~(1).SchDoc
PROJECT_renlian4.0/History/CPU.~(1).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(31).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(32).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(33).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(34).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(35).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(36).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(37).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(38).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(39).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(4).SchDoc
PROJECT_renlian4.0/History/CPU.~(40).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(41).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(42).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(43).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(44).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(45).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(46).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(47).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(48).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(49).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(5).SchDoc
PROJECT_renlian4.0/History/CPU.~(5).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(50).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(51).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(52).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(53).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(54).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(55).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(56).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(57).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(58).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(59).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(6).SchDoc
PROJECT_renlian4.0/History/CPU.~(6).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(60).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(61).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(62).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(7).SchDoc
PROJECT_renlian4.0/History/CPU.~(7).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(8).SchDoc
PROJECT_renlian4.0/History/CPU.~(8).SchDoc.Zip
PROJECT_renlian4.0/History/CPU.~(9).SchDoc.Zip
PROJECT_renlian4.0/History/E8EF6A10/
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(1).PcbLib
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(11).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(12).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(13).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(14).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(15).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(16).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(17).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(18).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(19).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(2).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(20).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(21).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(3).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(4).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(5).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(6).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(7).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(8).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/PCB.~(9).PcbLib.Zip
PROJECT_renlian4.0/History/E8EF6A10/SCH.~(1).SchLib.Zip
PROJECT_renlian4.0/History/main.~(1).SchDoc.Zip
PROJECT_renlian4.0/History/main.~(2).SchDoc.Zip
PROJECT_renlian4.0/History/main.~(3).SchDoc.Zip
PROJECT_renlian4.0/History/main.~(4).SchDoc.Zip
PROJECT_renlian4.0/History/main.~(5).SchDoc.Zip
PROJECT_renlian4.0/History/main.~(6).SchDoc.Zip
PROJECT_renlian4.0/History/main.~(7).SchDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(1).PCB
PROJECT_renlian4.0/History/PCB1.~(1).PcbDoc
PROJECT_renlian4.0/History/PCB1.~(1).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(10).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(11).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(12).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(13).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(14).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(15).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(16).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(17).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(18).PCB.Zip
PROJECT_renlian4.0/History/PCB1.~(18).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(19).PCB.Zip
PROJECT_renlian4.0/History/PCB1.~(19).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(2).PcbDoc
PROJECT_renlian4.0/History/PCB1.~(2).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(20).PCB.Zip
PROJECT_renlian4.0/History/PCB1.~(20).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(21).PCB.Zip
PROJECT_renlian4.0/History/PCB1.~(21).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(22).PCB.Zip
PROJECT_renlian4.0/History/PCB1.~(22).PcbDoc.Zip
PROJECT_renlian4.0/History/PCB1.~(23).PCB.Zip
PROJECT_renlian4.0

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