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文件名称:GPIO_PL_IPCORE

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2017-05-28
  • 文件大小：
    22.79mb
  • 已下载：
    0次
  • 提 供 者：
    l*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

VIVADO 2016.4 通过PS和PL实现GPIO接口的实现方式（3），这是完整工程！-VIVADO 2016.4　u901A　u8FC7PS　u548CP　u5B4E　u73B0GPIO　u63A5　u53E3　u7684　u5B9E　u73B0　u65B9　u5F0F　uFF083　uFF09　uFF0C　u8FD9　u662F　u5B8C　u6574　u5DE5　u7A0B　uFF01
(系统自动生成,下载前可以参看下载内容)

下载文件列表

GPIO_PL_IPCORE/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/gui_resources.wdf
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/java_command_handlers.wdf
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/project.wpc
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/synthesis.wdf
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/synthesis_details.wdf
GPIO_PL_IPCORE/GPIO_PL_IPCORE.cache/wt/webtalk_pa.xml
GPIO_PL_IPCORE/GPIO_PL_IPCORE.hw/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.hw/GPIO_PL_IPCORE.lpr
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ioplanning/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ioplanning/PIN_SET/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ioplanning/PIN_SET2/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/README.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/hdl/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/hdl/design_1.vhd
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_auto_pc_0/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_auto_pc_0/sim/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_auto_pc_0/sim/design_1_auto_pc_0.v
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_axi_gpio_0_1/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_axi_gpio_0_1/sim/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_axi_gpio_0_1/sim/design_1_axi_gpio_0_1.vhd
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_processing_system7_0_0/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_processing_system7_0_0/sim/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_processing_system7_0_0/sim/design_1_processing_system7_0_0.v
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_rst_ps7_0_100M_0/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_rst_ps7_0_100M_0/sim/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/bd/design_1/ip/design_1_rst_ps7_0_100M_0/sim/design_1_rst_ps7_0_100M_0.vhd
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/mem_init_files/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/mem_init_files/ps7_init.h
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/mem_init_files/ps7_init.html
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/mem_init_files/ps7_init.tcl
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/mem_init_files/ps7_init_gpl.h
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/README.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/README.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/compile.do
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/design_1.sh
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/design_1.udo
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/file_info.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/glbl.v
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/ps7_init.h
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/ps7_init.html
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/ps7_init.tcl
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/ps7_init_gpl.h
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/simulate.do
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/activehdl/wave.do
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/README.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/design_1.sh
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/file_info.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/glbl.v
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/ps7_init.h
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/ps7_init.html
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/ps7_init.tcl
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/ps7_init_gpl.h
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/ies/run.f
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/modelsim/
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/modelsim/README.txt
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/modelsim/compile.do
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/modelsim/design_1.sh
GPIO_PL_IPCORE/GPIO_PL_IPCORE.ip_user_files/sim_scripts/design_1/modelsim/design_1.udo
GPIO_PL_IPCORE/GPIO_PL_IP

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