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文件名称:SDRAM

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2017-07-20
  • 文件大小：
    25.75mb
  • 已下载：
    0次
  • 提 供 者：
    Devil*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

使用VHDL语言编写的对SDRAM进行读写操作控制器及其简单的测试层序。(VHDL language used to read and write operations controller SDRAM and its simple test sequence.)
相关搜索： sdram vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

SDRAM/
SDRAM/.git/
SDRAM/.git/COMMIT_EDITMSG
SDRAM/.git/config
SDRAM/.git/description
SDRAM/.git/HEAD
SDRAM/.git/hooks/
SDRAM/.git/hooks/applypatch-msg.sample
SDRAM/.git/hooks/commit-msg.sample
SDRAM/.git/hooks/post-update.sample
SDRAM/.git/hooks/pre-applypatch.sample
SDRAM/.git/hooks/pre-commit.sample
SDRAM/.git/hooks/pre-push.sample
SDRAM/.git/hooks/pre-rebase.sample
SDRAM/.git/hooks/pre-receive.sample
SDRAM/.git/hooks/prepare-commit-msg.sample
SDRAM/.git/hooks/update.sample
SDRAM/.git/index
SDRAM/.git/info/
SDRAM/.git/info/exclude
SDRAM/.git/logs/
SDRAM/.git/logs/HEAD
SDRAM/.git/logs/refs/
SDRAM/.git/logs/refs/heads/
SDRAM/.git/logs/refs/heads/master
SDRAM/.git/objects/
SDRAM/.git/objects/08/
SDRAM/.git/objects/08/887ed3d5d8bd39059de52c30d9dbc3ce916c9d
SDRAM/.git/objects/09/
SDRAM/.git/objects/09/253c212c06290a74e3abe209e9a859ef84b2c7
SDRAM/.git/objects/15/
SDRAM/.git/objects/15/66e61a2fd831cc53978bf81e4c65cfebd853f2
SDRAM/.git/objects/16/
SDRAM/.git/objects/16/39490f69cc1c2116dba2131bc991a7fe392e55
SDRAM/.git/objects/17/
SDRAM/.git/objects/17/d3b84736ff4573d01bc90d38954707b07e8869
SDRAM/.git/objects/1c/
SDRAM/.git/objects/1c/297f09b6ee4b0752eab67aef625025402053bd
SDRAM/.git/objects/23/
SDRAM/.git/objects/23/fffec353dd058f4421e9e13f1835dc30f513a1
SDRAM/.git/objects/33/
SDRAM/.git/objects/33/75fbb8b3be30d34f1d3eeeace5e66b43c2edca
SDRAM/.git/objects/33/e4b5f25a0fa6c5f603dc8499e7d8e2fa8a2663
SDRAM/.git/objects/3e/
SDRAM/.git/objects/3e/a27fd5df556d94963ce72a5d37fa8ce1c81652
SDRAM/.git/objects/41/
SDRAM/.git/objects/41/2c330f70eaae9b2937dcbe584b23174c115330
SDRAM/.git/objects/72/
SDRAM/.git/objects/72/d9156b384109601476f01141e52b488ed23923
SDRAM/.git/objects/78/
SDRAM/.git/objects/78/a942e82732046b47d2010df0da71236e54b8ca
SDRAM/.git/objects/79/
SDRAM/.git/objects/79/59ae016992b5698a8067a76a294d353365b30a
SDRAM/.git/objects/86/
SDRAM/.git/objects/86/57ae25b8a64113ae2c6ea40af42cd4cea758ca
SDRAM/.git/objects/99/
SDRAM/.git/objects/99/683177b2d4d2afd81b548ecc7e0b6999d4e25b
SDRAM/.git/objects/aa/
SDRAM/.git/objects/aa/a00b167233e0deb821dfd35479cde3ae785767
SDRAM/.git/objects/af/
SDRAM/.git/objects/af/665791d2f4a53f2894cd882481d84e6c6ab7dc
SDRAM/.git/objects/b4/
SDRAM/.git/objects/b4/105ea661735c6031e2c64e0be15cdde0b6c2c9
SDRAM/.git/objects/b6/
SDRAM/.git/objects/b6/20a8abc53784193247384bad89f26ca48cdca5
SDRAM/.git/objects/bf/
SDRAM/.git/objects/bf/beee8938fe6c9e5c0e05c74d252ee0c54c9369
SDRAM/.git/objects/c7/
SDRAM/.git/objects/c7/1f1f014e43084f5807a28b4d7bcac15898bb64
SDRAM/.git/objects/c8/
SDRAM/.git/objects/c8/2f3ad205ded718d10daf2d46695cce9d753e6a
SDRAM/.git/objects/d3/
SDRAM/.git/objects/d3/89a946caad2367e51bdda39a491ffa3e3adb25
SDRAM/.git/objects/e5/
SDRAM/.git/objects/e5/6c4f5843bae59fd12a3cbb0d33cfa81faa3c1f
SDRAM/.git/objects/ea/
SDRAM/.git/objects/ea/8e2b0ceb1c72fd94a2a4ebbd99fbd6a8201cf1
SDRAM/.git/objects/ec/
SDRAM/.git/objects/ec/ee08e119462655fa0a053baf6bd2995f71d17a
SDRAM/.git/objects/ed/
SDRAM/.git/objects/ed/2e878e91ae35b5be7609cfdb18fa0305ab8c87
SDRAM/.git/objects/ee/
SDRAM/.git/objects/ee/b2734b034241195dd86d6a2a24dc7c4f3dfe38
SDRAM/.git/objects/f6/
SDRAM/.git/objects/f6/d98a0c85e98ac6a470e80436b41a12785fae45
SDRAM/.git/objects/f9/
SDRAM/.git/objects/f9/d43f793c230111df49acb1e6a62f240d6e90b4
SDRAM/.git/objects/fe/
SDRAM/.git/objects/fe/b36c90086039ce72dedb1db32ad2bcb6421ee5
SDRAM/.git/objects/fe/f0a6d6b34192f6fee290e6d377e6ec4ea056a7
SDRAM/.git/objects/ff/
SDRAM/.git/objects/ff/9b59b8d97c12b21711b2eba1106b8993788e65
SDRAM/.git/objects/info/
SDRAM/.git/objects/pack/
SDRAM/.git/ORIG_HEAD
SDRAM/.git/refs/
SDRAM/.git/refs/heads/
SDRAM/.git/refs/heads/master
SDRAM/.git/refs/tags/
SDRAM/db/
SDRAM/db/.cmp.kpt
SDRAM/db/.ipregen.qmsg
SDRAM/db/prev_cmp_sdram_top.qmsg
SDRAM/db/sdram_pll_altpll.v
SDRAM/db/sdram_top.(0).cnf.cdb
SDRAM/db/sdram_top.(0).cnf.hdb
SDRAM/db/sdram_top.(1).cnf.cdb
SDRAM/db/sdram_top.(1).cnf.hdb
SDRAM/db/sdram_top.(2).cnf.cdb
SDRAM/db/sdram_top.(2).cnf.hdb
SDRAM/db/sdram_top.(3).cnf.cdb
SDRAM/db/sdram_top.(3).cnf.hdb
SDRAM/db/sdram_top.(4).cnf.cdb
SDRAM/db/sdram_top.(4).cnf.hdb
SDRAM/db/sdram_top.(5).cnf.cdb
SDRAM/db/sdram_top.(5).cnf.hdb
SDRAM/db/sdram_top.(6).cnf.cdb
SDRAM/db/sdram_top.(6).cnf.hdb
SDRAM/db/sdram_top.(7).cnf.cdb
SDRAM/db/sdram_top.(7).cnf.hdb
SDRAM/db/sdram_top.asm.qmsg
SDRAM/db/sdram_top.asm.rdb
SDRAM/db/sdram_top.asm_labs.ddb
SDRAM/db/sdram_top.cmp.bpm
SDRAM/db/sdram_top.cmp.cdb
SDRAM/db/sdram_top.cmp.hdb
SDRAM/db/sdram_top.cmp.idb
SDRAM/db/sdram_top.cmp.logdb
SDRAM/db/sdram_top.cmp.rdb
SDRAM/db/sdram_top.cmp_merge.kpt
SDRAM/db/sdram_top.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
SDRAM/db/sdram_top.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
SDRAM/db/sdram_top.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
SDRAM/db/sdram_top.db_info
SDRAM/db/sdram_top.eda.qmsg
SDRAM/db/sdram_top.fit.qmsg
SDRAM/db/sdram_top.hier_info
SDRAM/db/sdram_top.hif
SDRAM/db/sdram_top.lpc.html
SDRAM/db/sdram_top.lpc.rdb
SDRAM/db/sdram_top.lpc.txt
SDRAM/db/sdram_top.map.ammdb
SDRAM/db/sdram_top.map.bpm
SDRAM/db/sdram_top.map.cdb
SDRAM/db/sdram_top.map.hdb
SDRAM/db/sdram_top.map.kpt
SDRAM/db/

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