文件名称:基于FPGA的高速并转串程序
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该程序用Verilog语言实现了12.5MHz八位并行转为150MHz串行数据.
相关搜索: FPGA 并转串
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压缩包 : bianma_good.rar 列表 aaa/bianma.asm.rpt aaa/bianma.done aaa/bianma.eda.rpt aaa/bianma.fit.rpt aaa/bianma.fit.smsg aaa/bianma.fit.summary aaa/bianma.flow.rpt aaa/bianma.map.rpt aaa/bianma.map.smsg aaa/bianma.map.summary aaa/bianma.pin aaa/bianma.qpf aaa/bianma.qsf aaa/bianma.sof aaa/bianma.sta.rpt aaa/bianma.sta.summary aaa/bianma.v aaa/bianma.v.bak aaa/bianma_nativelink_simulation.rpt aaa/bianma_PLL.ppf aaa/bianma_PLL.qip aaa/bianma_PLL.v aaa/bianma_PLL_bb.v aaa/bianma_tb.v aaa/bianma_tb.v.bak aaa/B_c.v aaa/B_c.v.bak aaa/db/bianma.(0).cnf.cdb aaa/db/bianma.(0).cnf.hdb aaa/db/bianma.(1).cnf.cdb aaa/db/bianma.(1).cnf.hdb aaa/db/bianma.(2).cnf.cdb aaa/db/bianma.(2).cnf.hdb aaa/db/bianma.(3).cnf.cdb aaa/db/bianma.(3).cnf.hdb aaa/db/bianma.(4).cnf.cdb aaa/db/bianma.(4).cnf.hdb aaa/db/bianma.(5).cnf.cdb aaa/db/bianma.(5).cnf.hdb aaa/db/bianma.(6).cnf.cdb aaa/db/bianma.(6).cnf.hdb aaa/db/bianma.amm.cdb aaa/db/bianma.asm.qmsg aaa/db/bianma.asm.rdb aaa/db/bianma.asm_labs.ddb aaa/db/bianma.cbx.xml aaa/db/bianma.cmp.bpm aaa/db/bianma.cmp.cbp aaa/db/bianma.cmp.cdb aaa/db/bianma.cmp.hdb aaa/db/bianma.cmp.kpt aaa/db/bianma.cmp.logdb aaa/db/bianma.cmp.rdb aaa/db/bianma.cmp_merge.kpt aaa/db/bianma.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd aaa/db/bianma.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd aaa/db/bianma.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd aaa/db/bianma.db_info aaa/db/bianma.eda.qmsg aaa/db/bianma.fit.qmsg aaa/db/bianma.hier_info aaa/db/bianma.hif aaa/db/bianma.idb.cdb aaa/db/bianma.lpc.html aaa/db/bianma.lpc.rdb aaa/db/bianma.lpc.txt aaa/db/bianma.map.bpm aaa/db/bianma.map.cbp aaa/db/bianma.map.cdb aaa/db/bianma.map.hdb aaa/db/bianma.map.kpt aaa/db/bianma.map.logdb aaa/db/bianma.map.qmsg aaa/db/bianma.map_bb.cdb aaa/db/bianma.map_bb.hdb aaa/db/bianma.map_bb.logdb aaa/db/bianma.pre_map.cdb aaa/db/bianma.pre_map.hdb aaa/db/bianma.rtlv.hdb aaa/db/bianma.rtlv_sg.cdb aaa/db/bianma.rtlv_sg_swap.cdb aaa/db/bianma.sgdiff.cdb aaa/db/bianma.sgdiff.hdb aaa/db/bianma.sld_design_entry.sci aaa/db/bianma.sld_design_entry_dsc.sci aaa/db/bianma.smart_action.txt aaa/db/bianma.sta.qmsg aaa/db/bianma.sta.rdb aaa/db/bianma.sta_cmp.8_slow_1200mv_85c.tdb aaa/db/bianma.syn_hier_info aaa/db/bianma.tiscmp.fastest_slow_1200mv_0c.ddb aaa/db/bianma.tiscmp.fastest_slow_1200mv_85c.ddb aaa/db/bianma.tiscmp.fast_1200mv_0c.ddb aaa/db/bianma.tiscmp.slow_1200mv_0c.ddb aaa/db/bianma.tiscmp.slow_1200mv_85c.ddb aaa/db/bianma.tis_db_list.ddb aaa/db/bianma_PLL_altpll.v aaa/db/logic_util_heursitic.dat aaa/db/prev_cmp_bianma.qmsg aaa/greybox_tmp/cbx_args.txt aaa/incremental_db/compiled_partitions/bianma.db_info aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.cdb aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.dfp aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.hdb aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.kpt aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.logdb aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.rcfdb aaa/incremental_db/compiled_partitions/bianma.root_partition.cmp.re.rcfdb aaa/incremental_db/compiled_partitions/bianma.root_partition.hbdb.cdb aaa/incremental_db/compiled_partitions/bianma.root_partition.map.cdb aaa/incremental_db/compiled_partitions/bianma.root_partition.map.dpi aaa/incremental_db/compiled_partitions/bianma.root_partition.map.hdb aaa/incremental_db/compiled_partitions/bianma.root_partition.map.kpt aaa/incremental_db/README aaa/PLLJ_PLLSPE_INFO.txt aaa/receive.v aaa/reset.v aaa/simulation/modelsim/bianma.sft aaa/simulation/modelsim/bianma.vo aaa/simulation/modelsim/bianma_8_1200mv_0c_slow.vo aaa/simulation/modelsim/bianma_8_1200mv_0c_v_slow.sdo aaa/simulation/modelsim/bianma_8_1200mv_85c_slow.vo aaa/simulation/modelsim/bianma_8_1200mv_85c_v_slow.sdo aaa/simulation/modelsim/bianma_8_1200mv_85c_v_slow.sdo_typ.csd aaa/simulation/modelsim/bianma_min_1200mv_0c_fast.vo aaa/simulation/modelsim/bianma_min_1200mv_0c_v_fast.sdo aaa/simulation/modelsim/bianma_modelsim.xrf aaa/simulation/modelsim/bianma_run_msim_gate_verilog.do aaa/simulation/modelsim/bianma_run_msim_gate_verilog.do.bak aaa/simulation/modelsim/bianma_run_msim_rtl_verilog.do aaa/simulation/modelsim/bianma_run_msim_rtl_verilog.do.bak aaa/simulation/modelsim/bianma_run_msim_rtl_verilog.do.bak1 aaa/simulation/modelsim/bianma_run_msim_rtl_verilog.do.bak2 aaa/simulation/modelsim/bianma_v.sdo aaa/simulation/modelsim/gate_work/bianma/verilog.prw aaa/simulation/modelsim/gate_work/bianma/verilog.psm aaa/simulation/modelsim/gate_work/bianma/_primary.dat aaa/simulation/modelsim/gate_work/bianma/_primary.dbs aaa/simulation/modelsim/gate_work/bianma/_primary.vhd aaa/simulation/modelsim/gate_work/bianma_tb/verilog.prw aaa/simulation/modelsim/gate_work/bianma_tb/verilog.psm aaa/simulation/modelsim/gate_work/bianma_tb/_primary.dat aaa/simulation/modelsim/gate_work/bianma_tb/_primary.dbs aaa/simulation/modelsim/gate_work/bianma_tb/_primary.vhd aaa/simulation/modelsim/gate_work/_info aaa/simulation/modelsim/gate_work/_vmake aaa/simulation/modelsim/modelsim.ini aaa/simulation/modelsim/rtl_work/@b
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